Lines Matching defs:address

258  * @address: Resume address.
261  * On a wakeup, resume address will be automatically set by PMU.
269 				   uintptr_t address)
282 			 state, address, (address >> 32));
317  * @set_address: Resume address presence indicator.
318  *               1 resume address specified, 0 otherwise.
319  * @address: Resume address.
323  * as RPU0, RPU, or PL_CORE_xx. Resume address for the target PU will be
331 				 uintptr_t address,
338 	/* encode set Address into 1st bit of address */
339 	encoded_address = address;
544  * @address: Address to write to.
554 enum pm_ret_status pm_mmio_write(uintptr_t address,
561 	PM_PACK_PAYLOAD4(payload, PM_MMIO_WRITE, address, mask, value);
567  * @address: Address to write to.
576 enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value)
581 	PM_PACK_PAYLOAD2(payload, PM_MMIO_READ, address);
589  * @address_low: lower 32-bit Linear memory space address.
590  * @address_high: higher 32-bit Linear memory space address.
647  * @address_low: lower 32-bit Linear memory space address.
648  * @address_high: higher 32-bit Linear memory space address.
673  * @address_low: lower 32-bit address of the AesParams structure.
674  * @address_high: higher 32-bit address of the AesParams structure.
1606  * @address_low: lower 32-bit Linear memory space address.
1607  * @address_high: higher 32-bit Linear memory space address.
1757  * @address: Address of the register to be accessed.
1768 				      uint32_t address,
1775 	if (((ZYNQMP_CSU_BASEADDR & address) != ZYNQMP_CSU_BASEADDR) &&
1776 			((CSUDMA_BASE & address) != CSUDMA_BASE) &&
1777 			((RSA_CORE_BASE & address) != RSA_CORE_BASE) &&
1778 			((PMU_GLOBAL_BASE & address) != PMU_GLOBAL_BASE)) {
1784 		ret = pm_mmio_write(address, mask, value);
1787 		ret = pm_mmio_read(address, out);
1801  * @address_low: lower 32-bit Linear memory space address.
1802  * @address_high: higher 32-bit Linear memory space address.