Lines Matching defs:ver
44 static unsigned int ver;
46 if (!ver) {
47 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR +
49 ver &= ZYNQMP_SILICON_VER_MASK;
50 ver >>= ZYNQMP_SILICON_VER_SHIFT;
53 return ver;
58 unsigned int ver = zynqmp_get_silicon_ver();
60 if (ver == ZYNQMP_CSU_VERSION_QEMU) {
71 uint16_t ver;
80 .ver = 0x2c,
89 .ver = 0x2c,
99 .ver = 0x100,
105 .ver = 0x12c,
115 .ver = 0x100,
121 .ver = 0x12c,
131 .ver = 0x100,
137 .ver = 0x12c,
146 .ver = 0x2c,
155 .ver = 0x2c,
233 uint32_t id, ver, chipid[2];
244 ver = chipid[1] >> ZYNQMP_EFUSE_IPDISABLE_SHIFT;
248 zynqmp_devices[i].ver == (ver & ZYNQMP_CSU_VERSION_MASK)) {
268 if ((ver & ZYNQMP_PL_STATUS_MASK) != 0U) {
284 uint32_t ver;
286 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
287 ver &= ZYNQMP_RTL_VER_MASK;
288 ver >>= ZYNQMP_RTL_VER_SHIFT;
290 return ver;
339 uint32_t ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
341 ver &= ZYNQMP_PS_VER_MASK;
342 ver >>= ZYNQMP_PS_VER_SHIFT;
344 return ver + 1U;
349 uint32_t ver = zynqmp_get_silicon_ver();
353 switch (ver) {
408 uint32_t ver = zynqmp_get_silicon_ver();
410 if (ver == ZYNQMP_CSU_VERSION_QEMU) {