Lines Matching defs:n
27 #define CRU_SFTRST_DDR_CTRL(ch, n) ((0x1 << (8 + 16 + (ch) * 4)) | \
28 ((n) << (8 + (ch) * 4)))
29 #define CRU_SFTRST_DDR_PHY(ch, n) ((0x1 << (9 + 16 + (ch) * 4)) | \
30 ((n) << (9 + (ch) * 4)))
32 #define FBDIV_ENC(n) ((n) << 16)
33 #define FBDIV_DEC(n) (((n) >> 16) & 0xfff)
34 #define POSTDIV2_ENC(n) ((n) << 12)
35 #define POSTDIV2_DEC(n) (((n) >> 12) & 0x7)
36 #define POSTDIV1_ENC(n) ((n) << 8)
37 #define POSTDIV1_DEC(n) (((n) >> 8) & 0x7)
38 #define REFDIV_ENC(n) (n)
39 #define REFDIV_DEC(n) ((n) & 0x3f)
45 #define PRESET_GPIO0_HOLD(n) (((n) << 7) | WMSK_BIT(7))
46 #define PRESET_GPIO1_HOLD(n) (((n) << 8) | WMSK_BIT(8))
720 INFO("sdram_params->ddr_freq = %d\n", sdram_params->ddr_freq);