Lines Matching defs:timing_config

117 static uint32_t get_max_speed_rate(struct timing_related_config *timing_config)
119 	if (timing_config->ch_cnt > 1)
120 		return max(timing_config->dram_info[0].speed_rate,
121 					timing_config->dram_info[1].speed_rate);
123 		return timing_config->dram_info[0].speed_rate;
127 get_max_die_capability(struct timing_related_config *timing_config)
132 	for (ch = 0; ch < timing_config->ch_cnt; ch++) {
133 		for (cs = 0; cs < timing_config->dram_info[ch].cs_cnt; cs++) {
135 				      timing_config->
196  * Description: depend on input parameter "timing_config",
200  *   input: timing_config
203 static void ddr3_get_parameter(struct timing_related_config *timing_config,
206 	uint32_t nmhz = timing_config->freq;
207 	uint32_t ddr_speed_bin = get_max_speed_rate(timing_config);
208 	uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
214 	pdram_timing->bl = timing_config->bl;
239 	switch (timing_config->dramds) {
249 	if (timing_config->odt)
250 		switch (timing_config->dramodt) {
413  * Description: depend on input parameter "timing_config",
417  *   input: timing_config
420 static void lpddr2_get_parameter(struct timing_related_config *timing_config,
423 	uint32_t nmhz = timing_config->freq;
424 	uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
430 	pdram_timing->bl = timing_config->bl;
457 	switch (timing_config->dramds) {
653  * Description: depend on input parameter "timing_config",
657  *   input: timing_config
660 static void lpddr3_get_parameter(struct timing_related_config *timing_config,
663 	uint32_t nmhz = timing_config->freq;
664 	uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
670 	pdram_timing->bl = timing_config->bl;
711 	switch (timing_config->dramds) {
739 	if (timing_config->odt)
740 		switch (timing_config->dramodt) {
949  * Description: depend on input parameter "timing_config",
953  *   input: timing_config
956 static void lpddr4_get_parameter(struct timing_related_config *timing_config,
959 	uint32_t nmhz = timing_config->freq;
960 	uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
966 	pdram_timing->bl = timing_config->bl;
976 	tmp = (timing_config->bl == 32) ? 1 : 0;
990 		if (timing_config->rdbi) {
1002 		if (timing_config->rdbi) {
1014 		if (timing_config->rdbi) {
1026 		if (timing_config->rdbi) {
1040 		if (timing_config->rdbi) {
1054 		if (timing_config->rdbi) {
1068 		if (timing_config->rdbi) {
1083 	tmp = (timing_config->rdbi ? LPDDR4_DBI_RD_EN : 0) |
1084 	      (timing_config->wdbi ? LPDDR4_DBI_WR_EN : 0);
1085 	switch (timing_config->dramds) {
1107 	if (timing_config->odt) {
1108 		switch (timing_config->dramodt) {
1130 		switch (timing_config->caodt) {
1179 	if (timing_config->bl == 32)
1296  * Description: depend on input parameter "timing_config",
1300  *   input: timing_config
1304 void dram_get_parameter(struct timing_related_config *timing_config,
1307 	switch (timing_config->dram_type) {
1309 		ddr3_get_parameter(timing_config, pdram_timing);
1312 		lpddr2_get_parameter(timing_config, pdram_timing);
1315 		lpddr3_get_parameter(timing_config, pdram_timing);
1318 		lpddr4_get_parameter(timing_config, pdram_timing);