Lines Matching defs:cl
222 uint32_t cl;
260 static uint32_t get_rdlat_adj(uint32_t dram_type, uint32_t cl)
278 if (cl == p[i].cl)
327 rdlat = pdram_timing->cl + PI_ADD_LATENCY;
366 tmp = pdram_timing->cl;
411 cas_lat = pdram_timing->cl + PI_ADD_LATENCY;
530 ((pdram_timing->cl * 2) << 16));
656 pdram_timing->cl);
677 /* min_rl_preamble = cl+TDQSCK_MIN -1 */
678 tmp = pdram_timing->cl +
684 tmp = pdram_timing->cl - pdram_timing->cwl;
729 (pdram_timing->cl >= 5))
730 tmp = pdram_timing->cl - 5;
732 tmp = pdram_timing->cl - 2;
782 ((pdram_timing->cl * 2) << 8));
905 pdram_timing->cl));
926 /* min_rl_preamble = cl + TDQSCK_MIN - 1 */
927 tmp = pdram_timing->cl +
934 tmp = pdram_timing->cl - pdram_timing->cwl;
980 (pdram_timing->cl >= 5))
981 tmp = pdram_timing->cl - 5;
983 tmp = pdram_timing->cl - 2;
1061 (pdram_timing->cl * 2) << 16);
1089 /* min_rl_preamble = cl + TDQSCK_MIN - 1 */
1090 tmp1 = pdram_timing->cl;
1100 tmp = pdram_timing->cl - pdram_timing->cwl;
1238 (pdram_timing->cl * 2) << 8);
1265 /* min_rl_preamble = cl + TDQSCK_MIN - 1 */
1266 tmp1 = pdram_timing->cl +
1276 tmp = pdram_timing->cl - pdram_timing->cwl;
1612 cas_lat = pdram_timing->cl + PI_ADD_LATENCY;