Lines Matching defs:cpu_id

36 static inline uint32_t get_cpus_pwr_domain_cfg_info(uint32_t cpu_id)
40 	pd_reg = mmio_read_32(PMU_BASE + PMU_PWRDN_CON) & BIT(cpu_id);
41 	apm_reg = mmio_read_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id)) &
54 static int cpus_power_domain_on(uint32_t cpu_id)
58 	cpu_pd = PD_CPU0 + cpu_id;
59 	cfg_info = get_cpus_pwr_domain_cfg_info(cpu_id);
63 		mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id),
68 			mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id),
75 			WARN("%s: cpu%d is not in off,!\n", __func__, cpu_id);
79 		mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id),
86 static int cpus_power_domain_off(uint32_t cpu_id, uint32_t pd_cfg)
90 	cpu_pd = PD_CPU0 + cpu_id;
95 		if (check_cpu_wfie(cpu_id, CKECK_WFEI_MSK))
98 		mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id),
106 		mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id),
138 	uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
140 	assert(cpu_id < PLATFORM_CORE_COUNT);
141 	assert(cpuson_flags[cpu_id] == 0);
142 	cpuson_flags[cpu_id] = PMU_CPU_HOTPLUG;
143 	cpuson_entry_point[cpu_id] = entrypoint;
146 	cpus_power_domain_on(cpu_id);
153 	uint32_t cpu_id = plat_my_core_pos();
155 	cpus_power_domain_off(cpu_id, core_pwr_wfi);
162 	uint32_t cpu_id = plat_my_core_pos();
164 	assert(cpu_id < PLATFORM_CORE_COUNT);
165 	assert(cpuson_flags[cpu_id] == 0);
166 	cpuson_flags[cpu_id] = PMU_CPU_AUTO_PWRDN;
167 	cpuson_entry_point[cpu_id] = (uintptr_t)plat_get_sec_entrypoint();
170 	cpus_power_domain_off(cpu_id, core_pwr_wfi_int);
177 	uint32_t cpu_id = plat_my_core_pos();
179 	mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), CORES_PM_DISABLE);
186 	uint32_t cpu_id = plat_my_core_pos();
188 	mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), CORES_PM_DISABLE);