Lines Matching defs:ddr_data
102 static struct px30_sleep_ddr_data ddr_data
184 SAVE_QOS(ddr_data.cpu_qos, CPU);
187 SAVE_QOS(ddr_data.gpu_qos, GPU);
189 SAVE_QOS(ddr_data.isp_128m_qos, ISP_128M);
190 SAVE_QOS(ddr_data.isp_rd_qos, ISP_RD);
191 SAVE_QOS(ddr_data.isp_wr_qos, ISP_WR);
192 SAVE_QOS(ddr_data.isp_m1_qos, ISP_M1);
193 SAVE_QOS(ddr_data.vip_qos, VIP);
196 SAVE_QOS(ddr_data.rga_rd_qos, RGA_RD);
197 SAVE_QOS(ddr_data.rga_wr_qos, RGA_WR);
198 SAVE_QOS(ddr_data.vop_m0_qos, VOP_M0);
199 SAVE_QOS(ddr_data.vop_m1_qos, VOP_M1);
202 SAVE_QOS(ddr_data.vpu_qos, VPU);
203 SAVE_QOS(ddr_data.vpu_r128_qos, VPU_R128);
206 SAVE_QOS(ddr_data.emmc_qos, EMMC);
207 SAVE_QOS(ddr_data.nand_qos, NAND);
208 SAVE_QOS(ddr_data.sdio_qos, SDIO);
209 SAVE_QOS(ddr_data.sfc_qos, SFC);
212 SAVE_QOS(ddr_data.gmac_qos, GMAC);
214 SAVE_QOS(ddr_data.crypto_qos, CRYPTO);
216 SAVE_QOS(ddr_data.sdmmc_qos, SDMMC);
218 SAVE_QOS(ddr_data.usb_host_qos, USB_HOST);
219 SAVE_QOS(ddr_data.usb_otg_qos, USB_OTG);
225 RESTORE_QOS(ddr_data.cpu_qos, CPU);
228 RESTORE_QOS(ddr_data.gpu_qos, GPU);
230 RESTORE_QOS(ddr_data.isp_128m_qos, ISP_128M);
231 RESTORE_QOS(ddr_data.isp_rd_qos, ISP_RD);
232 RESTORE_QOS(ddr_data.isp_wr_qos, ISP_WR);
233 RESTORE_QOS(ddr_data.isp_m1_qos, ISP_M1);
234 RESTORE_QOS(ddr_data.vip_qos, VIP);
237 RESTORE_QOS(ddr_data.rga_rd_qos, RGA_RD);
238 RESTORE_QOS(ddr_data.rga_wr_qos, RGA_WR);
239 RESTORE_QOS(ddr_data.vop_m0_qos, VOP_M0);
240 RESTORE_QOS(ddr_data.vop_m1_qos, VOP_M1);
243 RESTORE_QOS(ddr_data.vpu_qos, VPU);
244 RESTORE_QOS(ddr_data.vpu_r128_qos, VPU_R128);
247 RESTORE_QOS(ddr_data.emmc_qos, EMMC);
248 RESTORE_QOS(ddr_data.nand_qos, NAND);
249 RESTORE_QOS(ddr_data.sdio_qos, SDIO);
250 RESTORE_QOS(ddr_data.sfc_qos, SFC);
253 RESTORE_QOS(ddr_data.gmac_qos, GMAC);
255 RESTORE_QOS(ddr_data.crypto_qos, CRYPTO);
257 RESTORE_QOS(ddr_data.sdmmc_qos, SDMMC);
259 RESTORE_QOS(ddr_data.usb_host_qos, USB_HOST);
260 RESTORE_QOS(ddr_data.usb_otg_qos, USB_OTG);
549 ddr_data.cru_clk_gate[i] =
556 ddr_data.cru_pmu_clk_gate[i] =
569 WITH_16BITS_WMSK(ddr_data.cru_pmu_clk_gate[i]));
573 WITH_16BITS_WMSK(ddr_data.cru_clk_gate[i]));
580 ddr_data.pmu_cru_clksel_con0 =
583 ddr_data.pgrf_pvtm_con[0] =
585 ddr_data.pgrf_pvtm_con[1] =
636 ddr_data.pmu_cru_clksel_con0 | BITS_WMSK(0x3U, 14));
639 WITH_16BITS_WMSK(ddr_data.pgrf_pvtm_con[0]));
641 ddr_data.pgrf_pvtm_con[1]);
647 ddr_data.ddrc_pwrctrl = mmio_read_32(DDR_UPCTL_BASE + 0x30);
651 ddr_data.ddrgrf_con1 = mmio_read_32(DDRGRF_BASE + 0x4);
655 ddr_data.ddrstdby_con0 = mmio_read_32(DDR_STDBY_BASE + 0x0);
661 ddr_data.ddrgrf_con0 = mmio_read_32(DDRGRF_BASE + 0x0);
667 ddr_data.pmugrf_soc_con0 =
677 ddr_data.pmugrf_soc_con0 | BITS_WMSK(0x1, 12));
681 ddr_data.ddrgrf_con0 | BITS_WMSK(0x1, 4));
684 ddr_data.ddrgrf_con0 | BITS_WMSK(0x1, 5));
688 ddr_data.ddrstdby_con0 | BITS_WMSK(0x1, 0));
692 ddr_data.ddrgrf_con1 | BITS_WMSK(0x1f, 0));
696 ddr_data.ddrc_pwrctrl | BITS_WMSK(0x3, 0));
706 ddr_data.pmic_slp_iomux = mmio_read_32(PMUGRF_BASE + GPIO0A_IOMUX);
708 ddr_data.pmu_pwrmd_core_l =
710 ddr_data.pmu_pwrmd_core_h =
712 ddr_data.pmu_pwrmd_cmm_l =
714 ddr_data.pmu_pwrmd_cmm_h =
716 ddr_data.pmu_wkup_cfg2_l = mmio_read_32(PMU_BASE + PMU_WKUP_CFG2_LO);
815 WITH_16BITS_WMSK(ddr_data.pmu_pwrmd_core_l));
817 WITH_16BITS_WMSK(ddr_data.pmu_pwrmd_core_h));
819 WITH_16BITS_WMSK(ddr_data.pmu_pwrmd_cmm_l));
821 WITH_16BITS_WMSK(ddr_data.pmu_pwrmd_cmm_h));
823 WITH_16BITS_WMSK(ddr_data.pmu_wkup_cfg2_l));
827 WITH_16BITS_WMSK(ddr_data.pmic_slp_iomux));
832 ddr_data.gpio0c_iomux = mmio_read_32(PMUGRF_BASE + GPIO0C_IOMUX);
852 WITH_16BITS_WMSK(ddr_data.gpio0c_iomux));
905 ddr_data.cru_plls_con_save[pll_id][i] =
918 mode = (ddr_data.cru_mode_save >> PLL_MODE_SHIFT(pll_id)) & 0x3;
921 mode = ddr_data.cru_pmu_mode_save & 0x3;
925 if (ddr_data.cru_plls_con_save[pll_id][1] & PLL_LOCK_MSK)
933 ddr_data.cru_mode_save = mmio_read_32(CRU_BASE + CRU_MODE);
934 ddr_data.cru_pmu_mode_save = mmio_read_32(PMUCRU_BASE + CRU_PMU_MODE);
935 ddr_data.clk_sel0 = mmio_read_32(CRU_BASE + CRU_CLKSELS_CON(0));
955 ddr_data.clk_sel0 | BITS_WMSK(0xf, 8));
959 ddr_data.clk_sel0 | BITS_WMSK(0xf, 0));
1057 psram_boot_cfg->ddr_data = (uint64_t)0;