Lines Matching defs:pwr_ctl

58 	uint32_t pwr_ctl;
62 	pwr_ctl = CPU_PWR_CTL_CLAMP | CPU_PWR_CTL_CORE_MEM_CLAMP |
64 	mmio_write_32(acs + CPU_PWR_CTL, pwr_ctl);
72 	pwr_ctl &= ~CPU_PWR_CTL_CORE_MEM_CLAMP;
73 	mmio_write_32(acs + CPU_PWR_CTL, pwr_ctl);
76 	pwr_ctl |= CPU_PWR_CTL_CORE_MEM_HS;
77 	mmio_write_32(acs + CPU_PWR_CTL, pwr_ctl);
81 	pwr_ctl &= ~CPU_PWR_CTL_CLAMP;
82 	mmio_write_32(acs + CPU_PWR_CTL, pwr_ctl);
86 	pwr_ctl &= ~(CPU_PWR_CTL_CORE_RST | CPU_PWR_CTL_COREPOR_RST);
87 	mmio_write_32(acs + CPU_PWR_CTL, pwr_ctl);
90 	pwr_ctl |= CPU_PWR_CTL_CORE_PWRD_UP;
91 	mmio_write_32(acs + CPU_PWR_CTL, pwr_ctl);
98 	uint32_t pwr_ctl, cbcr, ovr;
108 	pwr_ctl = L2_PWR_CTL_L2_HS_CLAMP | L2_PWR_CTL_L2_HS_EN |
112 	mmio_write_32(base + L2_PWR_CTL, pwr_ctl);
119 	pwr_ctl &= ~(L2_PWR_CTL_SCU_ARRAY_HS_CLAMP |
121 	mmio_write_32(base + L2_PWR_CTL, pwr_ctl);
123 	pwr_ctl |= (L2_PWR_CTL_L2_ARRAY_HS | L2_PWR_CTL_SCU_ARRAY_HS);
124 	mmio_write_32(base + L2_PWR_CTL, pwr_ctl);
131 	pwr_ctl &= ~L2_PWR_CTL_L2_HS_CLAMP;
132 	mmio_write_32(base + L2_PWR_CTL, pwr_ctl);
139 	pwr_ctl &= ~(L2_PWR_CTL_L2_HS_RST | L2_PWR_CTL_SYS_RESET);
140 	mmio_write_32(base + L2_PWR_CTL, pwr_ctl);
144 	pwr_ctl |= L2_PWR_CTL_PMIC_APC_ON;
145 	mmio_write_32(base + L2_PWR_CTL, pwr_ctl);