Lines Matching defs:bl_mem_params
249 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
262 assert(bl_mem_params);
273 err = parse_optee_header(&bl_mem_params->ep_info,
290 bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE;
296 bl_mem_params->ep_info.args.arg3 = ARM_PRELOADED_DTB_BASE;
298 bl_mem_params->ep_info.args.arg0 =
299 bl_mem_params->ep_info.args.arg1;
300 bl_mem_params->ep_info.args.arg1 = 0;
301 bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE;
302 bl_mem_params->ep_info.args.arg3 = 0;
304 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl32_entry();
312 pager_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc;
315 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry();
324 bl_mem_params->ep_info.args.arg0 =
326 bl_mem_params->ep_info.args.arg1 = 0U;
327 bl_mem_params->ep_info.args.arg2 = 0U;
328 bl_mem_params->ep_info.args.arg3 = 0U;
345 bl_mem_params->ep_info.args.arg1 =
348 bl_mem_params->ep_info.args.arg3 = (uintptr_t)ns_tl;
350 if (GET_RW(bl_mem_params->ep_info.spsr) == MODE_RW_32) {
352 bl_mem_params->ep_info.args.arg0 = 0;
353 bl_mem_params->ep_info.args.arg2 = te ?
358 bl_mem_params->ep_info.args.arg0 = te ?
361 bl_mem_params->ep_info.args.arg2 = 0;
365 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
369 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
376 err = load_sps_from_tb_fw_config(&bl_mem_params->image_info);
383 bl_mem_params->image_info.image_base;