Lines Matching defs:state
61 /* set core state in internal data */
78 /* set core state in internal data */
94 /* set core state in internal data */
124 /* set core state in internal data */
135 /* set core state in internal data */
153 /* set core state to standby */
160 * set core state to released
169 static void _pwr_suspend(const psci_power_state_t *state)
175 if (state->pwr_domain_state[PLAT_MAX_LVL] == PLAT_MAX_OFF_STATE) {
179 /* set core state */
183 } else if (state->pwr_domain_state[PLAT_MAX_LVL]
188 /* set core state */
194 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] ==
199 /* set core state */
205 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] ==
210 /* set core state */
216 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) {
221 /* set core state */
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) {
231 /* set core state */
241 static void _pwr_suspend_finish(const psci_power_state_t *state)
248 if (state->pwr_domain_state[PLAT_MAX_LVL] == PLAT_MAX_OFF_STATE) {
253 * set core state to released
258 } else if (state->pwr_domain_state[PLAT_MAX_LVL]
264 * set core state to released
271 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] ==
277 * set core state to released
284 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] ==
290 * set core state to released
297 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) {
302 * set core state to released
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) {
314 * set core state to released
335 /* turns a requested power state into a target power state
339 psci_power_state_t *state)
348 state->pwr_domain_state[PLAT_MAX_LVL] =
351 state->pwr_domain_state[PLAT_MAX_LVL] =
356 state->pwr_domain_state[PLAT_SYS_LVL] =
359 state->pwr_domain_state[PLAT_SYS_LVL] =
364 state->pwr_domain_state[PLAT_CLSTR_LVL] =
367 state->pwr_domain_state[PLAT_CLSTR_LVL] =
374 state->pwr_domain_state[PLAT_CORE_LVL] =
377 state->pwr_domain_state[PLAT_CORE_LVL] =