Lines Matching defs:state
19 int32_t nvg_enter_cstate(uint32_t ari_base, uint32_t state, uint32_t wake_time)
26 /* check for allowed power state */
27 if ((state != TEGRA_ARI_CORE_C0) && (state != TEGRA_ARI_CORE_C1) &&
28 (state != TEGRA_ARI_CORE_C6) && (state != TEGRA_ARI_CORE_C7)) {
29 ERROR("%s: unknown cstate (%d)\n", __func__, state);
37 write_actlr_el1(val | (uint64_t)state);
113 uint64_t nvg_read_cstate_stats(uint32_t ari_base, uint32_t state)
119 /* sanity check state */
120 if (state == 0U) {
130 (uint64_t)state));
137 int32_t nvg_write_cstate_stats(uint32_t ari_base, uint32_t state, uint32_t stats)
149 val = ((uint64_t)stats << MCE_CSTATE_STATS_TYPE_SHIFT) | state;
158 (uint64_t)state), val);
163 int32_t nvg_is_ccx_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time)
166 (void)state;
173 int32_t nvg_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time)
180 /* check for allowed power state */
181 if ((state != TEGRA_ARI_CORE_C0) && (state != TEGRA_ARI_CORE_C1) &&
182 (state != TEGRA_ARI_CORE_C6) && (state != TEGRA_ARI_CORE_C7)) {
183 ERROR("%s: unknown cstate (%d)\n", __func__, state);
189 * 31:0 = C-state for this core
192 ((uint64_t)state & MCE_SC7_ALLOWED_MASK);