Lines Matching defs:ops

77 	arch_mce_ops_t *ops;
85 .ops = &ari_mce_ops,
90 .ops = &ari_mce_ops,
95 .ops = &ari_mce_ops,
100 .ops = &ari_mce_ops,
105 .ops = &nvg_mce_ops,
110 .ops = &nvg_mce_ops,
152 return mce_cfg_table[cpuid].ops;
161 const arch_mce_ops_t *ops;
170 ops = mce_get_curr_cpu_ops();
177 ret = ops->enter_cstate(cpu_ari_base, arg0, arg1);
190 ret = ops->update_cstate_info(cpu_ari_base, (uint32_t)arg0,
201 ret = ops->update_crossover_time(cpu_ari_base, arg0, arg1);
206 ret64 = ops->read_cstate_stats(cpu_ari_base, arg0);
215 ret = ops->write_cstate_stats(cpu_ari_base, arg0, arg1);
220 ret = ops->is_ccx_allowed(cpu_ari_base, arg0, arg1);
228 ret = ops->is_sc7_allowed(cpu_ari_base, arg0, arg1);
237 ret = ops->online_core(cpu_ari_base, arg0);
242 ret = ops->cc3_ctrl(cpu_ari_base, arg0, arg1, arg2);
247 ret64 = ops->call_enum_misc(cpu_ari_base, TEGRA_ARI_MISC_ECHO,
259 ret64 = ops->call_enum_misc(cpu_ari_base, TEGRA_ARI_MISC_VERSION,
272 ret64 = ops->call_enum_misc(cpu_ari_base,
281 ret = ops->roc_flush_cache_trbits(cpu_ari_base);
286 ret = ops->roc_flush_cache(cpu_ari_base);
291 ret = ops->roc_clean_cache(cpu_ari_base);
296 ret64 = ops->read_write_mca(cpu_ari_base, arg0, &arg1);
306 ret64 = ops->read_write_mca(cpu_ari_base, arg0, &arg1);
327 ops->enter_ccplex_state(mce_get_curr_cpu_ari_base(),
334 ret = ops->read_write_uncore_perfmon(cpu_ari_base, arg0, &arg1);
341 ops->misc_ccplex(cpu_ari_base, arg0, arg1);
359 const arch_mce_ops_t *ops = mce_get_curr_cpu_ops();
361 ops->update_reset_vector(mce_get_curr_cpu_ari_base());
368 const arch_mce_ops_t *ops = mce_get_curr_cpu_ops();
370 ops->update_ccplex_gsc(mce_get_curr_cpu_ari_base(), gsc_idx);
396 const arch_mce_ops_t *ops = mce_get_curr_cpu_ops();
404 ops->enter_ccplex_state(mce_get_curr_cpu_ari_base(), state_idx);
418 const arch_mce_ops_t *ops = mce_get_curr_cpu_ops();
421 ops->update_cstate_info(mce_get_curr_cpu_ari_base(), cstate->cluster,
432 const arch_mce_ops_t *ops;
446 ops = mce_get_curr_cpu_ops();
455 version = ops->call_enum_misc(cpu_ari_base, TEGRA_ARI_MISC_VERSION, 0);