Lines Matching defs:ari_base
44 static inline uint32_t ari_read_32(uint32_t ari_base, uint32_t reg)
46 return mmio_read_32((uint64_t)ari_base + (uint64_t)reg);
49 static inline void ari_write_32(uint32_t ari_base, uint32_t val, uint32_t reg)
51 mmio_write_32((uint64_t)ari_base + (uint64_t)reg, val);
54 static inline uint32_t ari_get_request_low(uint32_t ari_base)
56 return ari_read_32(ari_base, ARI_REQUEST_DATA_LO);
59 static inline uint32_t ari_get_request_high(uint32_t ari_base)
61 return ari_read_32(ari_base, ARI_REQUEST_DATA_HI);
64 static inline uint32_t ari_get_response_low(uint32_t ari_base)
66 return ari_read_32(ari_base, ARI_RESPONSE_DATA_LO);
69 static inline uint32_t ari_get_response_high(uint32_t ari_base)
71 return ari_read_32(ari_base, ARI_RESPONSE_DATA_HI);
74 static inline void ari_clobber_response(uint32_t ari_base)
76 ari_write_32(ari_base, 0, ARI_RESPONSE_DATA_LO);
77 ari_write_32(ari_base, 0, ARI_RESPONSE_DATA_HI);
80 static int32_t ari_request_wait(uint32_t ari_base, uint32_t evt_mask, uint32_t req,
88 ari_write_32(ari_base, lo, ARI_REQUEST_DATA_LO);
89 ari_write_32(ari_base, hi, ARI_REQUEST_DATA_HI);
90 ari_write_32(ari_base, evt_mask, ARI_REQUEST_EVENT_MASK);
91 ari_write_32(ari_base, req | ARI_REQUEST_VALID_BIT, ARI_REQUEST);
113 status = ari_read_32(ari_base, ARI_STATUS);
137 int32_t ari_enter_cstate(uint32_t ari_base, uint32_t state, uint32_t wake_time)
150 ari_clobber_response(ari_base);
153 ret = ari_request_wait(ari_base, ARI_EVT_MASK_STANDBYWFI_BIT,
160 int32_t ari_update_cstate_info(uint32_t ari_base, uint32_t cluster, uint32_t ccplex,
167 ari_clobber_response(ari_base);
194 return ari_request_wait(ari_base, 0U, (uint32_t)TEGRA_ARI_UPDATE_CSTATE_INFO,
198 int32_t ari_update_crossover_time(uint32_t ari_base, uint32_t type, uint32_t time)
208 ari_clobber_response(ari_base);
211 ret = ari_request_wait(ari_base, 0U,
218 uint64_t ari_read_cstate_stats(uint32_t ari_base, uint32_t state)
228 ari_clobber_response(ari_base);
230 ret = ari_request_wait(ari_base, 0U,
235 result = (uint64_t)ari_get_response_low(ari_base);
241 int32_t ari_write_cstate_stats(uint32_t ari_base, uint32_t state, uint32_t stats)
244 ari_clobber_response(ari_base);
247 return ari_request_wait(ari_base, 0U, (uint32_t)TEGRA_ARI_WRITE_CSTATE_STATS,
251 uint64_t ari_enumeration_misc(uint32_t ari_base, uint32_t cmd, uint32_t data)
258 ari_clobber_response(ari_base);
265 ret = ari_request_wait(ari_base, 0U, (uint32_t)TEGRA_ARI_MISC, cmd, local_data);
270 resp = ari_get_response_low(ari_base);
271 resp |= ((uint64_t)ari_get_response_high(ari_base) << 32);
277 int32_t ari_is_ccx_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time)
283 ari_clobber_response(ari_base);
285 ret = ari_request_wait(ari_base, 0U, (uint32_t)TEGRA_ARI_IS_CCX_ALLOWED,
291 result = ari_get_response_low(ari_base) & 0x1U;
298 int32_t ari_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time)
309 ari_clobber_response(ari_base);
311 ret = ari_request_wait(ari_base, 0U,
318 result = (ari_get_response_low(ari_base) != 0U) ? 1 : 0;
325 int32_t ari_online_core(uint32_t ari_base, uint32_t core)
349 ari_clobber_response(ari_base);
350 ret = ari_request_wait(ari_base, 0U,
358 int32_t ari_cc3_ctrl(uint32_t ari_base, uint32_t freq, uint32_t volt, uint8_t enable)
363 ari_clobber_response(ari_base);
379 return ari_request_wait(ari_base, 0U,
383 int32_t ari_reset_vector_update(uint32_t ari_base)
386 ari_clobber_response(ari_base);
392 (void)ari_request_wait(ari_base, 0U,
398 int32_t ari_roc_flush_cache_trbits(uint32_t ari_base)
401 ari_clobber_response(ari_base);
403 return ari_request_wait(ari_base, 0U,
407 int32_t ari_roc_flush_cache(uint32_t ari_base)
410 ari_clobber_response(ari_base);
412 return ari_request_wait(ari_base, 0U,
416 int32_t ari_roc_clean_cache(uint32_t ari_base)
419 ari_clobber_response(ari_base);
421 return ari_request_wait(ari_base, 0U,
425 uint64_t ari_read_write_mca(uint32_t ari_base, uint64_t cmd, uint64_t *data)
436 ari_write_32(ari_base, (uint32_t)cmd, ARI_RESPONSE_DATA_LO);
437 ari_write_32(ari_base, (uint32_t)(cmd >> 32U), ARI_RESPONSE_DATA_HI);
439 ret = ari_request_wait(ari_base, 0U, (uint32_t)TEGRA_ARI_MCA,
443 resp_lo = ari_get_response_low(ari_base);
444 resp_hi = ari_get_response_high(ari_base);
454 resp_lo = ari_get_request_low(ari_base);
455 resp_hi = ari_get_request_high(ari_base);
465 int32_t ari_update_ccplex_gsc(uint32_t ari_base, uint32_t gsc_idx)
473 ari_clobber_response(ari_base);
480 (void)ari_request_wait(ari_base, 0U,
487 void ari_enter_ccplex_state(uint32_t ari_base, uint32_t state_idx)
490 ari_clobber_response(ari_base);
495 (void)ari_request_wait(ari_base, 0U,
499 int32_t ari_read_write_uncore_perfmon(uint32_t ari_base, uint64_t req,
509 ari_clobber_response(ari_base);
523 ret = ari_request_wait(ari_base, 0U,
529 req_status = ari_get_response_high(ari_base) &
538 *data = ari_get_response_low(ari_base);
547 void ari_misc_ccplex(uint32_t ari_base, uint32_t index, uint32_t value)
560 ari_clobber_response(ari_base);
561 (void)ari_request_wait(ari_base, 0U,