Lines Matching defs:cpu
18 void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu)
20 mmio_setbits_32(MCUCFG_CPC_FLOW_CTRL_CFG, GIC_WAKEUP_IGNORE(cpu));
23 void mcucfg_enable_gic_wakeup(unsigned int cluster, unsigned int cpu)
25 mmio_clrbits_32(MCUCFG_CPC_FLOW_CTRL_CFG, GIC_WAKEUP_IGNORE(cpu));
28 void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr)
32 mmio_write_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR), bootaddr);
35 uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu)
39 return (uintptr_t)mmio_read_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR));
42 void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64)
51 mmio_setbits_32(reg, MCUCFG_INITARCH_CPU_BIT(cpu));
53 mmio_clrbits_32(reg, MCUCFG_INITARCH_CPU_BIT(cpu));
78 bool spm_get_cpu_powerstate(unsigned int cluster, unsigned int cpu)
80 uint32_t mask = BIT(cpu);
115 * @cpu: the CPU ID of the CPU which to be powered on
117 void spm_poweron_cpu(unsigned int cluster, unsigned int cpu)
119 uintptr_t cpu_pwr_con = per_cpu(cluster, cpu, SPM_CPU_PWR);
122 if (cpu >= 4U) {
128 while (!spm_get_cpu_powerstate(cluster, cpu)) {
138 * @cpu: the CPU ID of the CPU which to be powered off
140 void spm_poweroff_cpu(unsigned int cluster, unsigned int cpu)
143 mmio_clrbits_32(per_cpu(cluster, cpu, SPM_CPU_PWR), PWR_ON);