Lines Matching defs:cpu
18 void mcucfg_disable_gic_wakeup(uint32_t cluster, uint32_t cpu)
20 mmio_setbits_32(MCUCFG_CPC_FLOW_CTRL_CFG, GIC_WAKEUP_IGNORE(cpu));
23 void mcucfg_enable_gic_wakeup(uint32_t cluster, uint32_t cpu)
25 mmio_clrbits_32(MCUCFG_CPC_FLOW_CTRL_CFG, GIC_WAKEUP_IGNORE(cpu));
28 void mcucfg_set_bootaddr(uint32_t cluster, uint32_t cpu, uintptr_t bootaddr)
32 mmio_write_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR), bootaddr);
35 uintptr_t mcucfg_get_bootaddr(uint32_t cluster, uint32_t cpu)
39 return (uintptr_t)mmio_read_32(per_cpu(cluster, cpu, MCUCFG_BOOTADDR));
42 void mcucfg_init_archstate(uint32_t cluster, uint32_t cpu, bool arm64)
51 mmio_setbits_32(reg, MCUCFG_INITARCH_CPU_BIT(cpu));
53 mmio_clrbits_32(reg, MCUCFG_INITARCH_CPU_BIT(cpu));
78 bool spm_get_cpu_powerstate(uint32_t cluster, uint32_t cpu)
80 uint32_t mask = BIT(cpu);
122 * @cpu: the CPU ID of the CPU which to be powered on
124 void spm_poweron_cpu(uint32_t cluster, uint32_t cpu)
127 if (cpu >= 4U) {
132 mmio_setbits_32(per_cpu(cluster, cpu, SPM_CPU_PWR), PWR_ON);
134 while (!spm_get_cpu_powerstate(cluster, cpu)) {
140 if (cpu >= 4U) {
141 mmio_clrbits_32(LAST_PC_REG(cpu), BIT(3));
149 * @cpu: the CPU ID of the CPU which to be powered off
151 void spm_poweroff_cpu(uint32_t cluster, uint32_t cpu)
154 mmio_clrbits_32(per_cpu(cluster, cpu, SPM_CPU_PWR), PWR_ON);