Lines Matching defs:bit
31 uint32_t pos, bit;
37 bit = pin % MAX_GPIO_REG_BITS;
40 mmio_write_32(DIR_BASE + 0x10U * pos + CLR, 1U << bit);
42 mmio_write_32(DIR_BASE + 0x10U * pos + SET, 1U << bit);
48 uint32_t pos, bit;
54 bit = pin % MAX_GPIO_REG_BITS;
57 return (((reg & (1U << bit)) != 0U) ? MT_GPIO_DIR_OUT : MT_GPIO_DIR_IN);
62 uint32_t pos, bit;
68 bit = pin % MAX_GPIO_REG_BITS;
71 mmio_write_32(DOUT_BASE + 0x10U * pos + CLR, 1U << bit);
73 mmio_write_32(DOUT_BASE + 0x10U * pos + SET, 1U << bit);
79 uint32_t pos, bit;
85 bit = pin % MAX_GPIO_REG_BITS;
88 return (((reg & (1U << bit)) != 0U) ? 1 : 0);
99 uint32_t bit = gpio_info.bit;
104 mmio_write_32(reg2 + SET, (1U << bit));
106 mmio_write_32(reg1 + SET, (1U << bit));
108 mmio_write_32(reg1 + CLR, (1U << bit));
111 mmio_write_32(reg2 + CLR, (1U << bit));
112 mmio_write_32((reg2 + 0x010U) + CLR, (1U << bit));
124 uint32_t bit = gpio_info.bit;
131 mmio_write_32(reg1 + CLR, (1U << bit));
132 mmio_write_32(reg2 + SET, (1U << bit));
134 mmio_write_32(reg2 + CLR, (1U << bit));
135 mmio_write_32(reg1 + SET, (1U << bit));
138 mmio_write_32(reg1 + CLR, (1U << bit));
139 mmio_write_32(reg2 + CLR, (1U << bit));
166 uint32_t bit = gpio_info.bit;
171 r0 = (mmio_read_32(reg2) >> bit) & 1U;
172 r1 = (mmio_read_32(reg2 + 0x010) >> bit) & 1U;
176 if (mmio_read_32(reg1) & (1U << bit)) {
194 uint32_t bit = gpio_info.bit;
198 pu = (mmio_read_32(reg1) >> bit) & 1U;
199 pd = (mmio_read_32(reg2) >> bit) & 1U;