Lines Matching defs:CLR

27 #define CLR			0x8
40 		mmio_write_32(DIR_BASE + 0x10U * pos + CLR, 1U << bit);
71 		mmio_write_32(DOUT_BASE + 0x10U * pos + CLR, 1U << bit);
108 			mmio_write_32(reg1 + CLR, (1U << bit));
111 		mmio_write_32(reg2 + CLR, (1U << bit));
112 		mmio_write_32((reg2 + 0x010U) + CLR, (1U << bit));
131 			mmio_write_32(reg1 + CLR, (1U << bit));
134 			mmio_write_32(reg2 + CLR, (1U << bit));
138 		mmio_write_32(reg1 + CLR, (1U << bit));
139 		mmio_write_32(reg2 + CLR, (1U << bit));