Lines Matching defs:x5
721 u_register_t x5, x6, x7;
854 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
856 status = intel_mbox_send_cmd(x1, (uint32_t *)x2, x3, x4, x5, x6,
865 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
868 status = intel_fcs_decryption(x2, x3, x4, x5, &send_id);
870 status = intel_fcs_encryption(x2, x3, x4, x5, &send_id);
875 SMC_RET3(handle, status, x4, x5);
878 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
883 status = intel_fcs_decryption_ext(x1, x2, x4, x5, x6,
886 status = intel_fcs_encryption_ext(x1, x2, x4, x5, x6,
984 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
986 x4, x5, &mbox_error);
990 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
993 x4, x5, (uint32_t *) &x6, false,
995 SMC_RET4(handle, status, mbox_error, x5, x6);
998 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1001 x4, x5, (uint32_t *) &x6, true,
1003 SMC_RET4(handle, status, mbox_error, x5, x6);
1006 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1009 x4, x5, (uint32_t *) &x6, false,
1011 SMC_RET4(handle, status, mbox_error, x5, x6);
1014 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1017 x4, x5, (uint32_t *) &x6, true,
1019 SMC_RET4(handle, status, mbox_error, x5, x6);
1022 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1024 x4, x5, &mbox_error);
1028 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1032 x4, x5, (uint32_t *) &x6, x7,
1034 SMC_RET4(handle, status, mbox_error, x5, x6);
1037 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1041 x4, x5, (uint32_t *) &x6, x7,
1043 SMC_RET4(handle, status, mbox_error, x5, x6);
1046 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1050 x4, x5, (uint32_t *) &x6, x7,
1052 SMC_RET4(handle, status, mbox_error, x5, x6);
1055 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1059 x4, x5, (uint32_t *) &x6, x7,
1061 SMC_RET4(handle, status, mbox_error, x5, x6);
1064 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1066 x4, x5, &mbox_error);
1070 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1073 x3, x4, x5, (uint32_t *) &x6, false,
1075 SMC_RET4(handle, status, mbox_error, x5, x6);
1078 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1081 x3, x4, x5, (uint32_t *) &x6, true,
1083 SMC_RET4(handle, status, mbox_error, x5, x6);
1086 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1089 x2, x3, x4, x5, (uint32_t *) &x6, false,
1091 SMC_RET4(handle, status, mbox_error, x5, x6);
1094 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1097 x2, x3, x4, x5, (uint32_t *) &x6, true,
1099 SMC_RET4(handle, status, mbox_error, x5, x6);
1102 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1104 x4, x5, &mbox_error);
1108 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1111 x4, x5, (uint32_t *) &x6, &mbox_error);
1112 SMC_RET4(handle, status, mbox_error, x5, x6);
1115 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1117 x4, x5, &mbox_error);
1121 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1124 x4, x5, (uint32_t *) &x6, &mbox_error);
1125 SMC_RET4(handle, status, mbox_error, x5, x6);
1128 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1130 x4, x5, &mbox_error);
1134 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1138 x1, x2, x3, x4, x5, (uint32_t *) &x6,
1140 SMC_RET4(handle, status, mbox_error, x5, x6);
1143 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1147 x1, x2, x3, x4, x5, (uint32_t *) &x6,
1149 SMC_RET4(handle, status, mbox_error, x5, x6);
1152 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1156 x1, x2, x3, x4, x5, (uint32_t *) &x6,
1158 SMC_RET4(handle, status, mbox_error, x5, x6);
1161 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1165 x1, x2, x3, x4, x5, (uint32_t *) &x6,
1167 SMC_RET4(handle, status, mbox_error, x5, x6);
1170 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1172 x4, x5, &mbox_error);
1181 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1183 x4, x5, &mbox_error);
1187 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1190 x4, x5, (uint32_t *) &x6, &mbox_error);
1191 SMC_RET4(handle, status, mbox_error, x5, x6);
1194 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1195 status = intel_fcs_aes_crypt_init(x1, x2, x3, x4, x5,
1200 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1203 x5, x6, false, &send_id);
1207 x5 = SMC_GET_GP(handle, CTX_GPREG_X5);
1210 x5, x6, true, &send_id);