Lines Matching defs:value
24 #define AGX_MPFE_IOHMC_CTRLCFG1_CFG_ADDR_ORDER(value) \
25 (((value) & 0x00000060) >> 5)
73 #define ACT_TO_ACT_DIFF_BANK(value) (((value) & 0x00fc0000) >> 18)
74 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12)
75 #define ACT_TO_RDWR(value) (((value) & 0x0000003f) >> 0)
76 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12)
79 #define RD_TO_RD_DIFF_CHIP(value) (((value) & 0x00000fc0) >> 6)
80 #define RD_TO_WR_DIFF_CHIP(value) (((value) & 0x3f000000) >> 24)
81 #define RD_TO_WR(value) (((value) & 0x00fc0000) >> 18)
82 #define RD_TO_PCH(value) (((value) & 0x00000fc0) >> 6)
85 #define CALTIMING3_WR_TO_RD_DIFF_CHIP(value) (((value) & 0x0003f000) >> 12)
86 #define CALTIMING3_WR_TO_RD(value) (((value) & 0x00000fc0) >> 6)
89 #define PCH_TO_VALID(value) (((value) & 0x00000fc0) >> 6)
148 #define AGX_MPFE_HMC_ADP_DDRCALSTAT_CAL(value) (((value) & 0x1) >> 0)