Lines Matching defs:reg
58 uint32_t reg = gpc_imr_offset[core_id] + imr_idx * 4;
62 gpc_saved_imrs[core_id + imr_idx * 4] = mmio_read_32(reg);
63 mmio_write_32(reg, ~gpc_wake_irqs[imr_idx]);
70 uint32_t reg = gpc_imr_offset[core_id] + imr_idx * 4;
75 mmio_write_32(reg, val);
110 uintptr_t reg;
118 reg = gpc_imr_offset[0] + (hwirq / 32) * 4;
119 val = mmio_read_32(reg);
121 mmio_write_32(reg, val);
127 uintptr_t reg;
135 reg = gpc_imr_offset[0] + (hwirq / 32) * 4;
136 val = mmio_read_32(reg);
138 mmio_write_32(reg, val);
185 uintptr_t reg;
197 reg = gpc_imr_offset[cpu_idx] + (hwirq / 32) * 4;
198 val = mmio_read_32(reg);
200 mmio_write_32(reg, val);
207 reg = gpc_imr_offset[i] + (hwirq / 32) * 4;
208 val = mmio_read_32(reg);
210 mmio_write_32(reg, val);
326 {.reg = 0x0, .override_mask = 0x140000, },
327 {.reg = 0x8, .override_mask = 0x140000, },
328 {.reg = 0x10, .override_mask = 0x140000, },
329 {.reg = 0x18, .override_mask = 0x140000, },
330 {.reg = 0x20, .override_mask = 0x140000, },
331 {.reg = 0x28, .override_mask = 0x140000, },
332 {.reg = 0x30, .override_mask = 0x1555540, },
333 {.reg = 0x3c, .override_mask = 0x1555540, },
334 {.reg = 0x48, .override_mask = 0x140, },
335 {.reg = 0x54, .override_mask = 0x140, },
336 {.reg = 0x60, .override_mask = 0x140, },
337 {.reg = 0x70, .override_mask = 0xa, },
347 mmio_setbits_32(IMX_ANAMIX_BASE + imx8mq_pll[i].reg,
350 mmio_clrbits_32(IMX_ANAMIX_BASE + imx8mq_pll[i].reg,