Lines Matching defs:core
84 * any A53 CORE can be the last core to suspend the system, But
91 unsigned int imr, core;
95 for (core = 0U; core < PLATFORM_CORE_COUNT; core++) {
96 gpc_save_imr_lpm(core, imr);
101 for (core = 0U; core < PLATFORM_CORE_COUNT; core++) {
102 gpc_restore_imr_lpm(core, imr);
194 * IMR bit to enable IRQ wakeup for this core.
203 /* clear affinity of other core */
216 /* use wfi power down the core */
221 /* enable the wfi power down of the core */
227 /* assert the pcg pcr bit of the core */
237 /* enable the core WFI PDN & IRQ PUP */
240 /* assert the pcg pcr bit of the core */
246 /* deassert the pcg pcr bit of the core */
260 /* SLOT2 for A53 primary core power up */
291 val &= ~COREx_IRQ_WUP(last_core); /* disable IRQ PUP for last core */
292 val |= COREx_LPM_PUP(last_core); /* enable LPM PUP for last core */
404 /* leave the IOMUX_GPC bit 12 on for core wakeup */