Lines Matching defs:core_id
37 void imx_set_cpu_secure_entry(unsigned int core_id, uintptr_t sec_entrypoint)
44 mmio_write_32(IMX_SRC_BASE + SRC_GPR1_OFFSET + (core_id << 3),
46 mmio_write_32(IMX_SRC_BASE + SRC_GPR1_OFFSET + (core_id << 3) + 4,
50 void imx_set_cpu_pwr_off(unsigned int core_id)
56 mmio_setbits_32(IMX_GPC_BASE + LPCR_A53_AD, COREx_WFI_PDN(core_id));
61 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1);
64 void imx_set_cpu_pwr_on(unsigned int core_id)
69 mmio_clrbits_32(IMX_GPC_BASE + LPCR_A53_AD, COREx_WFI_PDN(core_id));
74 mmio_clrbits_32(IMX_SRC_BASE + SRC_A53RCR1, (1 << core_id));
76 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1);
78 mmio_setbits_32(IMX_GPC_BASE + CPU_PGC_UP_TRG, (1 << core_id));
81 while ((mmio_read_32(IMX_GPC_BASE + CPU_PGC_UP_TRG) & (1 << core_id)) != 0)
85 mmio_clrbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1);
87 mmio_setbits_32(IMX_SRC_BASE + SRC_A53RCR1, (1 << core_id));
90 void imx_set_cpu_lpm(unsigned int core_id, bool pdn)
96 mmio_setbits_32(IMX_GPC_BASE + LPCR_A53_AD, COREx_WFI_PDN(core_id) |
97 COREx_IRQ_WUP(core_id));
99 mmio_setbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1);
102 mmio_clrbits_32(IMX_GPC_BASE + LPCR_A53_AD, COREx_WFI_PDN(core_id) |
103 COREx_IRQ_WUP(core_id));
105 mmio_clrbits_32(IMX_GPC_BASE + COREx_PGC_PCR(core_id), 0x1);