Lines Matching defs:reg_id
158 static int write_swreg_config(enum sw_reg reg_id, uint32_t addr, uint32_t data)
163 cmd = BSTI_CMD(0x1, BSTI_WRITE, reg_id, addr, BSTI_COMMAND_TA, data);
169 sw_reg_name[reg_id-1], addr);
175 static int read_swreg_config(enum sw_reg reg_id, uint32_t addr, uint32_t *data)
180 cmd = BSTI_CMD(0x1, BSTI_READ, reg_id, addr, BSTI_COMMAND_TA, PHY_REG0);
186 sw_reg_name[reg_id-1], addr);
195 static int swreg_config_done(enum sw_reg reg_id)
200 ret = read_swreg_config(reg_id, PHY_REG0, &read_data);
206 ret = write_swreg_config(reg_id, PHY_REG0, read_data);
210 ret = read_swreg_config(reg_id, PHY_REG0, &read_data);
215 ret = write_swreg_config(reg_id, PHY_REG0, read_data);
225 enum sw_reg reg_id;
230 for (reg_id = DDR_VDDC; reg_id <= DDRIO_MASTER; reg_id++) {
231 INFO("SWREG: %s\n", sw_reg_name[reg_id - 1]);
233 ret = read_swreg_config(reg_id, addr, &data);
242 int set_swreg(enum sw_reg reg_id, uint32_t micro_volts)
254 ret = read_swreg_config(reg_id, PHY_REGC, &programmed_step);
258 if (reg_id == DDR_VDDC)
264 ret = write_swreg_config(reg_id, PHY_REGC, step);
268 if (reg_id == DDR_VDDC)
271 ret = write_swreg_config(reg_id, PHY_REG0,
276 ret = write_swreg_config(reg_id, PHY_REG0,
282 INFO("%s voltage updated to %duV\n", sw_reg_name[reg_id-1],
292 ERROR("Failed to set %s voltage to %duV\n", sw_reg_name[reg_id-1],
302 enum sw_reg reg_id;
308 for (reg_id = DDR_VDDC; reg_id <= DDRIO_MASTER; reg_id++) {
311 ret = write_swreg_config(reg_id, addr,
312 FM_DATA[reg_id - 1][addr]);
319 for (reg_id = DDR_VDDC; reg_id <= DDRIO_MASTER; reg_id++) {
324 if ((reg_id == DDRIO_SLAVE) || (reg_id == VDDC1))
327 ret = swreg_config_done(reg_id);
330 , sw_reg_name[reg_id-1]);
335 for (reg_id = DDR_VDDC; reg_id <= DDRIO_MASTER; reg_id++) {
341 if (reg_id == IHOST_ARRAY)
345 ret = read_swreg_config(reg_id, addr, &data);
347 (data != FM_DATA[reg_id - 1][addr]))) {
349 sw_reg_name[reg_id - 1], addr);
351 data, FM_DATA[reg_id - 1][addr]);
371 sw_reg_name[reg_id-1]);