Lines Matching defs:node
24 * Each NS DRAM bank entry is 'reg' node property which is
36 int node;
43 * Find the offset of the node containing "arm,gic-v3" compatible property.
47 node = fdt_node_offset_by_compatible(hw_config_dtb, -1, "arm,gic-v3");
48 if (node < 0) {
49 WARN("FCONF: Unable to locate node with arm,gic-v3 compatible property\n");
56 err = fdt_get_reg_props_by_index(hw_config_dtb, node, 0, &addr, NULL);
58 ERROR("FCONF: Failed to read GICD reg property of GIC node\n");
63 err = fdt_get_reg_props_by_index(hw_config_dtb, node, 1, &addr, NULL);
65 ERROR("FCONF: Failed to read GICR reg property of GIC node\n");
75 int err, node, cluster_node, core_node, thread_node;
82 /* Find the offset of the node containing "arm,psci-1.0" compatible property */
83 node = fdt_node_offset_by_compatible(hw_config_dtb, -1, "arm,psci-1.0");
84 if (node < 0) {
85 ERROR("FCONF: Unable to locate node with arm,psci-1.0 compatible property\n");
86 return node;
89 err = fdt_read_uint32(hw_config_dtb, node, "max-pwr-lvl", &max_pwr_lvl);
101 /* Find the offset of the "cpus" node */
102 node = fdt_path_offset(hw_config_dtb, "/cpus");
103 if (node < 0) {
105 return node;
108 /* A typical cpu-map node in a device tree is shown here for reference
130 /* Locate the cpu-map child node */
131 node = fdt_subnode_offset(hw_config_dtb, node, "cpu-map");
132 if (node < 0) {
134 return node;
140 fdt_for_each_subnode(cluster_node, hw_config_dtb, node) {
154 /* Since in some dtbs, core nodes may not have thread node,
155 * no need to error if even one child node is not found.
160 /* Ensure every cluster node has at least 1 child node */
162 ERROR("FCONF: Unable to locate the core node in cluster %d\n", cluster_count);
176 /* At least one cluster node is expected in hardware configuration dtb */
178 ERROR("FCONF: Unable to locate the cluster node in cpu-map node\n");
192 int uart_node, node, err;
202 * uart child node is indirectly referenced through its path which is
203 * specified in the `serial1` property of the "aliases" node.
210 ERROR("FCONF: Could not read serial1 property in aliases node\n");
214 /* Find the offset of the uart serial node */
217 ERROR("FCONF: Failed to locate uart serial node using its path\n");
221 /* uart serial node has its offset and size of address in reg property */
225 ERROR("FCONF: Failed to read reg property of '%s' node\n",
229 VERBOSE("FCONF: UART node address: %lx\n", addr);
238 ERROR("FCONF: failed to translate UART node base address");
248 * The phandle of the DT node which captures the clock info of uart
249 * serial node is specified in the "clocks" property.
253 ERROR("FCONF: Could not read clocks property in uart serial node\n");
257 node = fdt_node_offset_by_phandle(hw_config_dtb, phandle);
258 if (node < 0) {
259 ERROR("FCONF: Failed to locate clk node using its path\n");
260 return node;
267 err = fdt_read_uint32(hw_config_dtb, node, "clock-frequency",
270 ERROR("FCONF: Could not read clock-frequency property in clk node\n");
282 int err, node;
287 /* Find the node offset point to "arm,armv8-timer" compatible property,
290 node = fdt_node_offset_by_compatible(hw_config_dtb, -1, "arm,armv8-timer");
291 if (node < 0) {
292 ERROR("FCONF: Unrecognized hardware configuration dtb (%d)\n", node);
293 return node;
297 err = fdt_read_uint32(hw_config_dtb, node, "clock-frequency", &cpu_timer.clock_freq);
307 int node, len;
313 /* Find 'memory' node */
314 node = fdt_node_offset_by_prop_value(hw_config_dtb, -1, "device_type",
316 if (node < 0) {
317 WARN("FCONF: Unable to locate 'memory' node\n");
318 return node;
321 reg = fdt_getprop(hw_config_dtb, node, "reg", &len);
337 ERROR("FCONF: Invalid 'memory' node\n");
343 hw_config_dtb, node, (int)i,
347 ERROR("FCONF: Failed to read 'reg' property #%lu of 'memory' node\n", i);