Lines Matching defs:fdt

163 	const void *fdt = (void *)(uintptr_t)FPGA_PRELOADED_DTB_BASE;
170 	node = fdt_node_offset_by_compatible(fdt, 0, "arm,armv8-timer");
174 		err = fdt_read_uint32(fdt, node, "clock-frequency", &freq);
180 	node = fdt_node_offset_by_compatible(fdt, 0, "arm,pl011");
185 		err = fdt_get_reg_props_by_index(fdt, node, 0,
218 static void fpga_dtb_update_clock(void *fdt, unsigned int freq)
224 	node = fdt_node_offset_by_compatible(fdt, 0, "arm,pl011");
231 	err = fdt_read_uint32(fdt, node, "clocks", &phandle);
238 	node = fdt_node_offset_by_phandle(fdt, phandle);
245 	err = fdt_setprop_inplace(fdt, node,
258 static int fpga_dtb_set_commandline(void *fdt, const char *cmdline)
265 	chosen = fdt_add_subnode(fdt, 0, "chosen");
267 		chosen = fdt_path_offset(fdt, "/chosen");
298 	err = fdt_setprop(fdt, chosen, "bootargs",
304 	return fdt_appendprop(fdt, chosen, "bootargs", &nul, 1);
309 	void *fdt = (void *)(uintptr_t)FPGA_PRELOADED_DTB_BASE;
313 	err = fdt_open_into(fdt, fdt, FPGA_MAX_DTB_SIZE);
315 		ERROR("cannot open devicetree at %p: %d\n", fdt, err);
320 	if (fdt_add_reserved_memory(fdt, "tf-a@80000000", BL31_BASE,
327 		err = fpga_dtb_set_commandline(fdt, cmdline);
341 	err = fdt_add_cpus_node(fdt, FPGA_MAX_PE_PER_CPU,
356 			err = fdt_adjust_gic_redist(fdt, nr_cores,
365 	fpga_dtb_update_clock(fdt, system_freq);
369 		int node = fdt_node_offset_by_compatible(fdt, 0,
373 			fdt_del_node(fdt, node);
379 		int node = fdt_node_offset_by_compatible(fdt, 0,
383 			fdt_del_node(fdt, node);
387 	err = fdt_pack(fdt);
389 		ERROR("Failed to pack Device Tree at %p: error %d\n", fdt, err);
392 	clean_dcache_range((uintptr_t)fdt, fdt_blob_size(fdt));