Lines Matching defs:err
164 int node, err;
174 err = fdt_read_uint32(fdt, node, "clock-frequency", &freq);
175 if (err >= 0) {
185 err = fdt_get_reg_props_by_index(fdt, node, 0,
187 if (err >= 0) {
222 int node, err;
231 err = fdt_read_uint32(fdt, node, "clocks", &phandle);
232 if (err != 0) {
245 err = fdt_setprop_inplace(fdt, node,
249 if (err < 0) {
263 int slen, err;
298 err = fdt_setprop(fdt, chosen, "bootargs",
300 if (err != 0) {
301 return err;
311 int err;
313 err = fdt_open_into(fdt, fdt, FPGA_MAX_DTB_SIZE);
314 if (err < 0) {
315 ERROR("cannot open devicetree at %p: %d\n", fdt, err);
327 err = fpga_dtb_set_commandline(fdt, cmdline);
328 if (err == 0) {
332 ERROR("failed to put command line into DTB: %d\n", err);
336 if (err < 0) {
337 ERROR("Error %d extending Device Tree\n", err);
341 err = fdt_add_cpus_node(fdt, FPGA_MAX_PE_PER_CPU,
345 if (err == -EEXIST) {
348 if (err < 0) {
349 ERROR("Error %d creating the /cpus DT node\n", err);
356 err = fdt_adjust_gic_redist(fdt, nr_cores,
359 if (err < 0) {
360 ERROR("Error %d fixing up GIC DT node\n", err);
387 err = fdt_pack(fdt);
388 if (err < 0) {
389 ERROR("Failed to pack Device Tree at %p: error %d\n", fdt, err);