Lines Matching defs:lvl

173 	unsigned int my_idx, lvl, parent_idx;
183 	for (lvl = PSCI_CPU_PWR_LVL; lvl <= end_pwrlvl; lvl++) {
335 	unsigned int lvl;
343 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= max_pwrlvl; lvl++) {
345 		prev[lvl - 1U] = *psci_get_req_local_pwr_states(lvl, cpu_idx);
348 		if (lvl <= end_pwrlvl) {
349 			req_state = state_info->pwr_domain_state[lvl];
353 		psci_set_req_local_pwr_state(lvl, cpu_idx, req_state);
364 	unsigned int lvl;
371 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= max_pwrlvl; lvl++) {
373 		psci_set_req_local_pwr_state(lvl, cpu_idx, prev[lvl - 1U]);
431 	unsigned int parent_idx, lvl;
438 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
439 		pd_state[lvl] = get_non_cpu_pd_node_local_state(parent_idx);
444 	for (; lvl <= PLAT_MAX_PWR_LVL; lvl++)
445 		target_state->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN;
457 	unsigned int parent_idx, lvl;
471 	for (lvl = 1U; lvl <= end_pwrlvl; lvl++) {
472 		set_non_cpu_pd_node_local_state(parent_idx, pd_state[lvl]);
502 	unsigned int parent_idx, cpu_idx = plat_my_core_pos(), lvl;
506 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
509 		psci_set_req_local_pwr_state(lvl,
547 	unsigned int lvl, parent_idx, cpu_idx = plat_my_core_pos();
557 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
560 		psci_set_req_local_pwr_state(lvl, cpu_idx,
561 					     state_info->pwr_domain_state[lvl]);
565 		req_states = psci_get_req_local_pwr_states(lvl, start_idx);
572 		target_state = plat_get_target_pwr_state(lvl,
576 		state_info->pwr_domain_state[lvl] = target_state;
579 		if (is_local_state_run(state_info->pwr_domain_state[lvl]) != 0)
591 	for (lvl = lvl + 1U; lvl <= end_pwrlvl; lvl++) {
592 		psci_set_req_local_pwr_state(lvl, cpu_idx,
593 					     state_info->pwr_domain_state[lvl]);
594 		state_info->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN;
624 	unsigned int lvl, parent_idx, cpu_idx = plat_my_core_pos();
639 	for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
642 		req_states = psci_get_req_local_pwr_states(lvl, start_idx);
649 		target_state = plat_get_target_pwr_state(lvl,
657 		if (state_info->pwr_domain_state[lvl] != target_state) {
671 	lvl = state_info->last_at_pwrlvl;
672 	if (!psci_is_last_cpu_to_idle_at_pwrlvl(lvl)) {