Lines Matching defs:reg_value

386 	uint32_t reg_value = 0U;
389 	reg_value |= OTG_DIEPTSIZ_PKTCNT_1;
390 	reg_value |= (EP0_FIFO_SIZE & OTG_DIEPTSIZ_XFRSIZ);
391 	reg_value |= OTG_DOEPTSIZ_RXDPID_STUPCNT;
393 	mmio_write_32(reg_offset, reg_value);
468 	uint32_t reg_value;
475 			reg_value = OTG_DIEPTSIZ_PKTCNT_1;
483 			reg_value = (OTG_DIEPTSIZ_PKTCNT &
490 				reg_value |= OTG_DIEPTSIZ_MCNT_DATA0;
494 		mmio_clrsetbits_32(reg_offset + OTG_DIEPTSIZ, clear_value, reg_value);
502 		reg_value = OTG_DIEPCTL_CNAK | OTG_DIEPCTL_EPENA;
506 				reg_value |= OTG_DIEPCTL_SODDFRM;
508 				reg_value |= OTG_DIEPCTL_SD0PID_SEVNFRM;
512 		mmio_setbits_32(reg_offset + OTG_DIEPCTL, reg_value);
525 			reg_value = ep->maxpacket | OTG_DIEPTSIZ_PKTCNT_1;
529 			reg_value = (pktcnt << OTG_DIEPTSIZ_PKTCNT_SHIFT) |
535 				   reg_value);
538 		reg_value = OTG_DOEPCTL_CNAK | OTG_DOEPCTL_EPENA;
542 				reg_value |= OTG_DOEPCTL_SD1PID_SODDFRM;
544 				reg_value |= OTG_DOEPCTL_SD0PID_SEVNFRM;
548 		mmio_setbits_32(reg_offset + OTG_DOEPCTL, reg_value);
564 	uint32_t reg_value;
571 			reg_value = OTG_DIEPTSIZ_PKTCNT_1;
584 			reg_value = OTG_DIEPTSIZ_PKTCNT_1 | ep->xfer_len;
589 				   reg_value);
613 		reg_value = OTG_DIEPTSIZ_PKTCNT_1 | ep->maxpacket;
617 				   reg_value);
637 	uint32_t reg_value;
642 		reg_value = mmio_read_32(reg_offset + OTG_DIEPCTL);
644 		if ((reg_value & OTG_DIEPCTL_EPENA) == 0U) {
645 			reg_value &= ~OTG_DIEPCTL_EPDIS;
648 		reg_value |= OTG_DIEPCTL_STALL;
650 		mmio_write_32(reg_offset + OTG_DIEPCTL, reg_value);
654 		reg_value = mmio_read_32(reg_offset + OTG_DOEPCTL);
656 		if ((reg_value & OTG_DOEPCTL_EPENA) == 0U) {
657 			reg_value &= ~OTG_DOEPCTL_EPDIS;
660 		reg_value |= OTG_DOEPCTL_STALL;
662 		mmio_write_32(reg_offset + OTG_DOEPCTL, reg_value);