Lines Matching defs:ret

398 	int ret;
405 	ret = write_eo_data(base + _PKA_RAM_A, curve_def[cid].a, curve_def[cid].a_size, eo_nbw);
406 	if (ret < 0) {
407 		return ret;
410 	ret = write_eo_data(base + _PKA_RAM_PRIME_N,
413 	if (ret < 0) {
414 		return ret;
417 	ret = write_eo_data(base + _PKA_RAM_P, curve_def[cid].p,
419 	if (ret < 0) {
420 		return ret;
423 	ret = write_eo_data(base + _PKA_RAM_XG, curve_def[cid].xg, curve_def[cid].xg_size, eo_nbw);
424 	if (ret < 0) {
425 		return ret;
428 	ret = write_eo_data(base + _PKA_RAM_YG, curve_def[cid].yg, curve_def[cid].yg_size, eo_nbw);
429 	if (ret < 0) {
430 		return ret;
616 	int ret;
626 	ret = stm32_pka_ecdsa_check_param(sig_r_ptr, sig_r_size,
631 	if (ret < 0) {
632 		INFO("%s check param error %d\n", __func__, ret);
638 		ret = -EBUSY;
644 	ret = stm32_pka_ecdsa_verif_configure_curve(base, cid);
645 	if (ret < 0) {
650 	ret = write_eo_data(base + _PKA_RAM_XQ, pk_x_ptr, pk_x_size, eo_nbw);
651 	if (ret < 0) {
655 	ret = write_eo_data(base + _PKA_RAM_YQ, pk_y_ptr, pk_y_size, eo_nbw);
656 	if (ret < 0) {
661 	ret = write_eo_data(base + _PKA_RAM_HASH_Z, hash, hash_size, eo_nbw);
662 	if (ret < 0) {
667 	ret = write_eo_data(base + _PKA_RAM_SIGN_R, sig_r_ptr, sig_r_size, eo_nbw);
668 	if (ret < 0) {
672 	ret = write_eo_data(base + _PKA_RAM_SIGN_S, sig_s_ptr, sig_s_size, eo_nbw);
673 	if (ret < 0) {
678 	ret = pka_enable(base, _PKA_CR_MODE_ECDSA_VERIF);
679 	if (ret < 0) {
680 		WARN("%s set mode pka error %d\n", __func__, ret);
685 	ret = stm32_pka_process(base);
686 	if (ret < 0) {
687 		WARN("%s process error %d\n", __func__, ret);
692 	ret = stm32_pka_ecdsa_verif_check_return(base);
701 	return ret;