Lines Matching defs:clksrc
21 #include <dt-bindings/clock/stm32mp1-clksrc.h>
1469 unsigned int clksrc,
1476 uintptr_t clksrc_address = rcc_base + (clksrc >> 4);
1487 /* Check current clksrc */
1489 if (src != (clksrc & RCC_SELR_SRC_MASK)) {
1686 static int stm32mp1_set_clksrc(unsigned int clksrc)
1688 uintptr_t clksrc_address = stm32mp_rcc_base() + (clksrc >> 4);
1692 clksrc & RCC_SELR_SRC_MASK);
1697 ERROR("CLKSRC %x start failed @ 0x%lx: 0x%x\n", clksrc,
1725 static void stm32mp1_mco_csg(uint32_t clksrc, uint32_t clkdiv)
1727 uintptr_t clksrc_address = stm32mp_rcc_base() + (clksrc >> 4);
1730 * Binding clksrc :
1735 if ((clksrc & 0x8U) != 0U) {
1740 clksrc & RCC_MCOCFG_MCOSRC_MASK);
1748 static void stm32mp1_set_rtcsrc(unsigned int clksrc, bool lse_css)
1753 (clksrc != (uint32_t)CLK_RTC_DISABLED)) {
1756 (clksrc & RCC_SELR_SRC_MASK) << RCC_BDCR_RTCSRC_SHIFT);
1816 unsigned int clksrc[CLKSRC_NB];
1837 ret = fdt_rcc_read_uint32_array("st,clksrc", (uint32_t)CLKSRC_NB,
1838 clksrc);
1868 stm32mp1_mco_csg(clksrc[CLKSRC_MCO1], clkdiv[CLKDIV_MCO1]);
1869 stm32mp1_mco_csg(clksrc[CLKSRC_MCO2], clkdiv[CLKDIV_MCO2]);
1924 clksrc[CLKSRC_PLL3],
1932 clksrc[CLKSRC_PLL4],
2005 ret = stm32mp1_set_clksrc(clksrc[CLKSRC_PLL12]);
2011 ret = stm32mp1_set_clksrc(clksrc[CLKSRC_PLL3]);
2018 ret = stm32mp1_set_clksrc(clksrc[CLKSRC_PLL4]);
2069 ret = stm32mp1_set_clksrc(clksrc[CLKSRC_MPU]);
2073 ret = stm32mp1_set_clksrc(clksrc[CLKSRC_AXI]);
2077 ret = stm32mp1_set_clksrc(clksrc[CLKSRC_MCU]);
2081 stm32mp1_set_rtcsrc(clksrc[CLKSRC_RTC], lse_css);