Lines Matching defs:x
171 #define IPSR_28_FUNC(x) ((uint32_t)(x) << 28U)
172 #define IPSR_24_FUNC(x) ((uint32_t)(x) << 24U)
173 #define IPSR_20_FUNC(x) ((uint32_t)(x) << 20U)
174 #define IPSR_16_FUNC(x) ((uint32_t)(x) << 16U)
175 #define IPSR_12_FUNC(x) ((uint32_t)(x) << 12U)
176 #define IPSR_8_FUNC(x) ((uint32_t)(x) << 8U)
177 #define IPSR_4_FUNC(x) ((uint32_t)(x) << 4U)
178 #define IPSR_0_FUNC(x) ((uint32_t)(x) << 0U)
237 #define DRVCTRL0_QSPI0_SPCLK(x) ((uint32_t)(x) << 28U)
238 #define DRVCTRL0_QSPI0_MOSI_IO0(x) ((uint32_t)(x) << 24U)
239 #define DRVCTRL0_QSPI0_MISO_IO1(x) ((uint32_t)(x) << 20U)
240 #define DRVCTRL0_QSPI0_IO2(x) ((uint32_t)(x) << 16U)
241 #define DRVCTRL0_QSPI0_IO3(x) ((uint32_t)(x) << 12U)
242 #define DRVCTRL0_QSPI0_SSL(x) ((uint32_t)(x) << 8U)
243 #define DRVCTRL0_QSPI1_SPCLK(x) ((uint32_t)(x) << 4U)
244 #define DRVCTRL0_QSPI1_MOSI_IO0(x) ((uint32_t)(x) << 0U)
245 #define DRVCTRL1_QSPI1_MISO_IO1(x) ((uint32_t)(x) << 28U)
246 #define DRVCTRL1_QSPI1_IO2(x) ((uint32_t)(x) << 24U)
247 #define DRVCTRL1_QSPI1_IO3(x) ((uint32_t)(x) << 20U)
248 #define DRVCTRL1_QSPI1_SS(x) ((uint32_t)(x) << 16U)
249 #define DRVCTRL1_RPC_INT(x) ((uint32_t)(x) << 12U)
250 #define DRVCTRL1_RPC_WP(x) ((uint32_t)(x) << 8U)
251 #define DRVCTRL1_RPC_RESET(x) ((uint32_t)(x) << 4U)
252 #define DRVCTRL1_AVB_RX_CTL(x) ((uint32_t)(x) << 0U)
253 #define DRVCTRL2_AVB_RXC(x) ((uint32_t)(x) << 28U)
254 #define DRVCTRL2_AVB_RD0(x) ((uint32_t)(x) << 24U)
255 #define DRVCTRL2_AVB_RD1(x) ((uint32_t)(x) << 20U)
256 #define DRVCTRL2_AVB_RD2(x) ((uint32_t)(x) << 16U)
257 #define DRVCTRL2_AVB_RD3(x) ((uint32_t)(x) << 12U)
258 #define DRVCTRL2_AVB_TX_CTL(x) ((uint32_t)(x) << 8U)
259 #define DRVCTRL2_AVB_TXC(x) ((uint32_t)(x) << 4U)
260 #define DRVCTRL2_AVB_TD0(x) ((uint32_t)(x) << 0U)
261 #define DRVCTRL3_AVB_TD1(x) ((uint32_t)(x) << 28U)
262 #define DRVCTRL3_AVB_TD2(x) ((uint32_t)(x) << 24U)
263 #define DRVCTRL3_AVB_TD3(x) ((uint32_t)(x) << 20U)
264 #define DRVCTRL3_AVB_TXCREFCLK(x) ((uint32_t)(x) << 16U)
265 #define DRVCTRL3_AVB_MDIO(x) ((uint32_t)(x) << 12U)
266 #define DRVCTRL3_AVB_MDC(x) ((uint32_t)(x) << 8U)
267 #define DRVCTRL3_AVB_MAGIC(x) ((uint32_t)(x) << 4U)
268 #define DRVCTRL3_AVB_PHY_INT(x) ((uint32_t)(x) << 0U)
269 #define DRVCTRL4_AVB_LINK(x) ((uint32_t)(x) << 28U)
270 #define DRVCTRL4_AVB_AVTP_MATCH(x) ((uint32_t)(x) << 24U)
271 #define DRVCTRL4_AVB_AVTP_CAPTURE(x) ((uint32_t)(x) << 20U)
272 #define DRVCTRL4_IRQ0(x) ((uint32_t)(x) << 16U)
273 #define DRVCTRL4_IRQ1(x) ((uint32_t)(x) << 12U)
274 #define DRVCTRL4_IRQ2(x) ((uint32_t)(x) << 8U)
275 #define DRVCTRL4_IRQ3(x) ((uint32_t)(x) << 4U)
276 #define DRVCTRL4_IRQ4(x) ((uint32_t)(x) << 0U)
277 #define DRVCTRL5_IRQ5(x) ((uint32_t)(x) << 28U)
278 #define DRVCTRL5_PWM0(x) ((uint32_t)(x) << 24U)
279 #define DRVCTRL5_PWM1(x) ((uint32_t)(x) << 20U)
280 #define DRVCTRL5_PWM2(x) ((uint32_t)(x) << 16U)
281 #define DRVCTRL5_A0(x) ((uint32_t)(x) << 12U)
282 #define DRVCTRL5_A1(x) ((uint32_t)(x) << 8U)
283 #define DRVCTRL5_A2(x) ((uint32_t)(x) << 4U)
284 #define DRVCTRL5_A3(x) ((uint32_t)(x) << 0U)
285 #define DRVCTRL6_A4(x) ((uint32_t)(x) << 28U)
286 #define DRVCTRL6_A5(x) ((uint32_t)(x) << 24U)
287 #define DRVCTRL6_A6(x) ((uint32_t)(x) << 20U)
288 #define DRVCTRL6_A7(x) ((uint32_t)(x) << 16U)
289 #define DRVCTRL6_A8(x) ((uint32_t)(x) << 12U)
290 #define DRVCTRL6_A9(x) ((uint32_t)(x) << 8U)
291 #define DRVCTRL6_A10(x) ((uint32_t)(x) << 4U)
292 #define DRVCTRL6_A11(x) ((uint32_t)(x) << 0U)
293 #define DRVCTRL7_A12(x) ((uint32_t)(x) << 28U)
294 #define DRVCTRL7_A13(x) ((uint32_t)(x) << 24U)
295 #define DRVCTRL7_A14(x) ((uint32_t)(x) << 20U)
296 #define DRVCTRL7_A15(x) ((uint32_t)(x) << 16U)
297 #define DRVCTRL7_A16(x) ((uint32_t)(x) << 12U)
298 #define DRVCTRL7_A17(x) ((uint32_t)(x) << 8U)
299 #define DRVCTRL7_A18(x) ((uint32_t)(x) << 4U)
300 #define DRVCTRL7_A19(x) ((uint32_t)(x) << 0U)
301 #define DRVCTRL8_CLKOUT(x) ((uint32_t)(x) << 28U)
302 #define DRVCTRL8_CS0(x) ((uint32_t)(x) << 24U)
303 #define DRVCTRL8_CS1_A2(x) ((uint32_t)(x) << 20U)
304 #define DRVCTRL8_BS(x) ((uint32_t)(x) << 16U)
305 #define DRVCTRL8_RD(x) ((uint32_t)(x) << 12U)
306 #define DRVCTRL8_RD_W(x) ((uint32_t)(x) << 8U)
307 #define DRVCTRL8_WE0(x) ((uint32_t)(x) << 4U)
308 #define DRVCTRL8_WE1(x) ((uint32_t)(x) << 0U)
309 #define DRVCTRL9_EX_WAIT0(x) ((uint32_t)(x) << 28U)
310 #define DRVCTRL9_PRESETOU(x) ((uint32_t)(x) << 24U)
311 #define DRVCTRL9_D0(x) ((uint32_t)(x) << 20U)
312 #define DRVCTRL9_D1(x) ((uint32_t)(x) << 16U)
313 #define DRVCTRL9_D2(x) ((uint32_t)(x) << 12U)
314 #define DRVCTRL9_D3(x) ((uint32_t)(x) << 8U)
315 #define DRVCTRL9_D4(x) ((uint32_t)(x) << 4U)
316 #define DRVCTRL9_D5(x) ((uint32_t)(x) << 0U)
317 #define DRVCTRL10_D6(x) ((uint32_t)(x) << 28U)
318 #define DRVCTRL10_D7(x) ((uint32_t)(x) << 24U)
319 #define DRVCTRL10_D8(x) ((uint32_t)(x) << 20U)
320 #define DRVCTRL10_D9(x) ((uint32_t)(x) << 16U)
321 #define DRVCTRL10_D10(x) ((uint32_t)(x) << 12U)
322 #define DRVCTRL10_D11(x) ((uint32_t)(x) << 8U)
323 #define DRVCTRL10_D12(x) ((uint32_t)(x) << 4U)
324 #define DRVCTRL10_D13(x) ((uint32_t)(x) << 0U)
325 #define DRVCTRL11_D14(x) ((uint32_t)(x) << 28U)
326 #define DRVCTRL11_D15(x) ((uint32_t)(x) << 24U)
327 #define DRVCTRL11_AVS1(x) ((uint32_t)(x) << 20U)
328 #define DRVCTRL11_AVS2(x) ((uint32_t)(x) << 16U)
329 #define DRVCTRL11_GP7_02(x) ((uint32_t)(x) << 12U)
330 #define DRVCTRL11_GP7_03(x) ((uint32_t)(x) << 8U)
331 #define DRVCTRL11_DU_DOTCLKIN0(x) ((uint32_t)(x) << 4U)
332 #define DRVCTRL11_DU_DOTCLKIN1(x) ((uint32_t)(x) << 0U)
333 #define DRVCTRL12_DU_DOTCLKIN2(x) ((uint32_t)(x) << 28U)
334 #define DRVCTRL12_DU_DOTCLKIN3(x) ((uint32_t)(x) << 24U)
335 #define DRVCTRL12_DU_FSCLKST(x) ((uint32_t)(x) << 20U)
336 #define DRVCTRL12_DU_TMS(x) ((uint32_t)(x) << 4U)
337 #define DRVCTRL13_TDO(x) ((uint32_t)(x) << 28U)
338 #define DRVCTRL13_ASEBRK(x) ((uint32_t)(x) << 24U)
339 #define DRVCTRL13_SD0_CLK(x) ((uint32_t)(x) << 20U)
340 #define DRVCTRL13_SD0_CMD(x) ((uint32_t)(x) << 16U)
341 #define DRVCTRL13_SD0_DAT0(x) ((uint32_t)(x) << 12U)
342 #define DRVCTRL13_SD0_DAT1(x) ((uint32_t)(x) << 8U)
343 #define DRVCTRL13_SD0_DAT2(x) ((uint32_t)(x) << 4U)
344 #define DRVCTRL13_SD0_DAT3(x) ((uint32_t)(x) << 0U)
345 #define DRVCTRL14_SD1_CLK(x) ((uint32_t)(x) << 28U)
346 #define DRVCTRL14_SD1_CMD(x) ((uint32_t)(x) << 24U)
347 #define DRVCTRL14_SD1_DAT0(x) ((uint32_t)(x) << 20U)
348 #define DRVCTRL14_SD1_DAT1(x) ((uint32_t)(x) << 16U)
349 #define DRVCTRL14_SD1_DAT2(x) ((uint32_t)(x) << 12U)
350 #define DRVCTRL14_SD1_DAT3(x) ((uint32_t)(x) << 8U)
351 #define DRVCTRL14_SD2_CLK(x) ((uint32_t)(x) << 4U)
352 #define DRVCTRL14_SD2_CMD(x) ((uint32_t)(x) << 0U)
353 #define DRVCTRL15_SD2_DAT0(x) ((uint32_t)(x) << 28U)
354 #define DRVCTRL15_SD2_DAT1(x) ((uint32_t)(x) << 24U)
355 #define DRVCTRL15_SD2_DAT2(x) ((uint32_t)(x) << 20U)
356 #define DRVCTRL15_SD2_DAT3(x) ((uint32_t)(x) << 16U)
357 #define DRVCTRL15_SD2_DS(x) ((uint32_t)(x) << 12U)
358 #define DRVCTRL15_SD3_CLK(x) ((uint32_t)(x) << 8U)
359 #define DRVCTRL15_SD3_CMD(x) ((uint32_t)(x) << 4U)
360 #define DRVCTRL15_SD3_DAT0(x) ((uint32_t)(x) << 0U)
361 #define DRVCTRL16_SD3_DAT1(x) ((uint32_t)(x) << 28U)
362 #define DRVCTRL16_SD3_DAT2(x) ((uint32_t)(x) << 24U)
363 #define DRVCTRL16_SD3_DAT3(x) ((uint32_t)(x) << 20U)
364 #define DRVCTRL16_SD3_DAT4(x) ((uint32_t)(x) << 16U)
365 #define DRVCTRL16_SD3_DAT5(x) ((uint32_t)(x) << 12U)
366 #define DRVCTRL16_SD3_DAT6(x) ((uint32_t)(x) << 8U)
367 #define DRVCTRL16_SD3_DAT7(x) ((uint32_t)(x) << 4U)
368 #define DRVCTRL16_SD3_DS(x) ((uint32_t)(x) << 0U)
369 #define DRVCTRL17_SD0_CD(x) ((uint32_t)(x) << 28U)
370 #define DRVCTRL17_SD0_WP(x) ((uint32_t)(x) << 24U)
371 #define DRVCTRL17_SD1_CD(x) ((uint32_t)(x) << 20U)
372 #define DRVCTRL17_SD1_WP(x) ((uint32_t)(x) << 16U)
373 #define DRVCTRL17_SCK0(x) ((uint32_t)(x) << 12U)
374 #define DRVCTRL17_RX0(x) ((uint32_t)(x) << 8U)
375 #define DRVCTRL17_TX0(x) ((uint32_t)(x) << 4U)
376 #define DRVCTRL17_CTS0(x) ((uint32_t)(x) << 0U)
377 #define DRVCTRL18_RTS0_TANS(x) ((uint32_t)(x) << 28U)
378 #define DRVCTRL18_RX1(x) ((uint32_t)(x) << 24U)
379 #define DRVCTRL18_TX1(x) ((uint32_t)(x) << 20U)
380 #define DRVCTRL18_CTS1(x) ((uint32_t)(x) << 16U)
381 #define DRVCTRL18_RTS1_TANS(x) ((uint32_t)(x) << 12U)
382 #define DRVCTRL18_SCK2(x) ((uint32_t)(x) << 8U)
383 #define DRVCTRL18_TX2(x) ((uint32_t)(x) << 4U)
384 #define DRVCTRL18_RX2(x) ((uint32_t)(x) << 0U)
385 #define DRVCTRL19_HSCK0(x) ((uint32_t)(x) << 28U)
386 #define DRVCTRL19_HRX0(x) ((uint32_t)(x) << 24U)
387 #define DRVCTRL19_HTX0(x) ((uint32_t)(x) << 20U)
388 #define DRVCTRL19_HCTS0(x) ((uint32_t)(x) << 16U)
389 #define DRVCTRL19_HRTS0(x) ((uint32_t)(x) << 12U)
390 #define DRVCTRL19_MSIOF0_SCK(x) ((uint32_t)(x) << 8U)
391 #define DRVCTRL19_MSIOF0_SYNC(x) ((uint32_t)(x) << 4U)
392 #define DRVCTRL19_MSIOF0_SS1(x) ((uint32_t)(x) << 0U)
393 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U)
394 #define DRVCTRL20_MSIOF0_SS2(x) ((uint32_t)(x) << 24U)
395 #define DRVCTRL20_MSIOF0_RXD(x) ((uint32_t)(x) << 20U)
396 #define DRVCTRL20_MLB_CLK(x) ((uint32_t)(x) << 16U)
397 #define DRVCTRL20_MLB_SIG(x) ((uint32_t)(x) << 12U)
398 #define DRVCTRL20_MLB_DAT(x) ((uint32_t)(x) << 8U)
399 #define DRVCTRL20_MLB_REF(x) ((uint32_t)(x) << 4U)
400 #define DRVCTRL20_SSI_SCK0129(x) ((uint32_t)(x) << 0U)
401 #define DRVCTRL21_SSI_WS0129(x) ((uint32_t)(x) << 28U)
402 #define DRVCTRL21_SSI_SDATA0(x) ((uint32_t)(x) << 24U)
403 #define DRVCTRL21_SSI_SDATA1(x) ((uint32_t)(x) << 20U)
404 #define DRVCTRL21_SSI_SDATA2(x) ((uint32_t)(x) << 16U)
405 #define DRVCTRL21_SSI_SCK34(x) ((uint32_t)(x) << 12U)
406 #define DRVCTRL21_SSI_WS34(x) ((uint32_t)(x) << 8U)
407 #define DRVCTRL21_SSI_SDATA3(x) ((uint32_t)(x) << 4U)
408 #define DRVCTRL21_SSI_SCK4(x) ((uint32_t)(x) << 0U)
409 #define DRVCTRL22_SSI_WS4(x) ((uint32_t)(x) << 28U)
410 #define DRVCTRL22_SSI_SDATA4(x) ((uint32_t)(x) << 24U)
411 #define DRVCTRL22_SSI_SCK5(x) ((uint32_t)(x) << 20U)
412 #define DRVCTRL22_SSI_WS5(x) ((uint32_t)(x) << 16U)
413 #define DRVCTRL22_SSI_SDATA5(x) ((uint32_t)(x) << 12U)
414 #define DRVCTRL22_SSI_SCK6(x) ((uint32_t)(x) << 8U)
415 #define DRVCTRL22_SSI_WS6(x) ((uint32_t)(x) << 4U)
416 #define DRVCTRL22_SSI_SDATA6(x) ((uint32_t)(x) << 0U)
417 #define DRVCTRL23_SSI_SCK78(x) ((uint32_t)(x) << 28U)
418 #define DRVCTRL23_SSI_WS78(x) ((uint32_t)(x) << 24U)
419 #define DRVCTRL23_SSI_SDATA7(x) ((uint32_t)(x) << 20U)
420 #define DRVCTRL23_SSI_SDATA8(x) ((uint32_t)(x) << 16U)
421 #define DRVCTRL23_SSI_SDATA9(x) ((uint32_t)(x) << 12U)
422 #define DRVCTRL23_AUDIO_CLKA(x) ((uint32_t)(x) << 8U)
423 #define DRVCTRL23_AUDIO_CLKB(x) ((uint32_t)(x) << 4U)
424 #define DRVCTRL23_USB0_PWEN(x) ((uint32_t)(x) << 0U)
425 #define DRVCTRL24_USB0_OVC(x) ((uint32_t)(x) << 28U)
426 #define DRVCTRL24_USB1_PWEN(x) ((uint32_t)(x) << 24U)
427 #define DRVCTRL24_USB1_OVC(x) ((uint32_t)(x) << 20U)
428 #define DRVCTRL24_USB30_PWEN(x) ((uint32_t)(x) << 16U)
429 #define DRVCTRL24_USB30_OVC(x) ((uint32_t)(x) << 12U)
430 #define DRVCTRL24_USB31_PWEN(x) ((uint32_t)(x) << 8U)
431 #define DRVCTRL24_USB31_OVC(x) ((uint32_t)(x) << 4U)
592 #define RTDMAC_RDMSAR(x) (RTDMAC_BASE + 0x8000U + (0x80U * (x)))
593 #define RTDMAC_RDMDAR(x) (RTDMAC_BASE + 0x8004U + (0x80U * (x)))
594 #define RTDMAC_RDMTCR(x) (RTDMAC_BASE + 0x8008U + (0x80U * (x)))
595 #define RTDMAC_RDMCHCR(x) (RTDMAC_BASE + 0x800CU + (0x80U * (x)))
596 #define RTDMAC_RDMCHCRB(x) (RTDMAC_BASE + 0x801CU + (0x80U * (x)))
597 #define RTDMAC_RDMDPBASE(x) (RTDMAC_BASE + 0x8050U + (0x80U * (x)))