Lines Matching defs:x
56 #define FSPI_INSTR_OPRND0(x) (x << FSPI_INSTR_OPRND0_SHIFT)
58 #define FSPI_INSTR_PAD0(x) ((x) << FSPI_INSTR_PAD0_SHIFT)
60 #define FSPI_INSTR_OPCODE0(x) ((x) << FSPI_INSTR_OPCODE0_SHIFT)
62 #define FSPI_INSTR_OPRND1(x) ((x) << FSPI_INSTR_OPRND1_SHIFT)
64 #define FSPI_INSTR_PAD1(x) ((x) << FSPI_INSTR_PAD1_SHIFT)
66 #define FSPI_INSTR_OPCODE1(x) ((x) << FSPI_INSTR_OPCODE1_SHIFT)
153 #define FSPI_MCR0_AHB_TIMEOUT(x) ((x) << 24)
154 #define FSPI_MCR0_IP_TIMEOUT(x) ((x) << 16)
163 #define FSPI_MCR0_RXCLKSRC(x) ((x) << 4)
164 #define FSPI_MCR0_END_CFG(x) ((x) << 2)
182 #define FSPI_MCR1_SEQ_TIMEOUT(x) ((x) << 16)
183 #define FSPI_MCR1_AHB_TIMEOUT(x) (x)
186 #define FSPI_MCR2_IDLE_WAIT(x) ((x) << 24)
266 #define FSPI_FLSHXCR0_SZ(x) ((x) >> FSPI_FLSHXCR0_SZ_KB)
272 #define FSPI_FLSHXCR1_CSINTR(x) ((x) << 16)
273 #define FSPI_FLSHXCR1_CAS(x) ((x) << 11)
275 #define FSPI_FLSHXCR1_TCSH(x) ((x) << 5)
276 #define FSPI_FLSHXCR1_TCSS(x) (x)
300 #define FSPI_IPCR1_IDATSZ(x) (x)
333 #define FSPI_IPRXFCR_WMRK(x) ((x) << 2)
338 #define FSPI_IPTXFCR_WMRK(x) ((x) << 2)
347 #define FSPI_STS0_DLPHB(x) ((x) << 8)
348 #define FSPI_STS0_DLPHA(x) ((x) << 4)
349 #define FSPI_STS0_CMD_SRC(x) ((x) << 2)
354 #define FSPI_STS1_IP_ERRCD(x) ((x) << 24)
355 #define FSPI_STS1_IP_ERRID(x) ((x) << 16)
356 #define FSPI_STS1_AHB_ERRCD(x) ((x) << 8)
357 #define FSPI_STS1_AHB_ERRID(x) (x)
360 #define FSPI_AHBSPNST_DATLFT(x) ((x) << 16)
361 #define FSPI_AHBSPNST_BUFID(x) ((x) << 1)
365 #define FSPI_IPRXFSTS_RDCNTR(x) ((x) << 16)
366 #define FSPI_IPRXFSTS_FILL(x) (x)
369 #define FSPI_IPTXFSTS_WRCNTR(x) ((x) << 16)
370 #define FSPI_IPTXFSTS_FILL(x) (x)