Lines Matching defs:pdimm
33 const struct dimm_params *pdimm)
41 const unsigned int ba_bits_cs_n = pdimm->bank_addr_bits;
42 const unsigned int row_bits_cs_n = pdimm->n_row_addr - 12U;
43 const unsigned int col_bits_cs_n = pdimm->n_col_addr - 8U;
44 const unsigned int bg_bits_cs_n = pdimm->bank_group_bits;
74 const struct dimm_params *pdimm)
92 const struct dimm_params *pdimm,
120 const int pretoact_mclk = picos_to_mclk(clk, pdimm->trp_ps);
121 const int acttopre_mclk = picos_to_mclk(clk, pdimm->tras_ps);
122 const int acttorw_mclk = picos_to_mclk(clk, pdimm->trcd_ps);
124 const int trfc1_min = pdimm->die_density >= 0x3 ? 16000 :
125 (pdimm->die_density == 0x4 ? 26000 :
126 (pdimm->die_density == 0x5 ? 35000 :
129 pdimm->trfc1_ps) - 8;
130 int wrrec_mclk = picos_to_mclk(clk, pdimm->twr_ps);
132 pdimm->trrds_ps),
152 pdimm->trp_ps) >> 4U;
154 pdimm->tras_ps) >> 4U;
156 pdimm->trcd_ps) >> 4U;
160 pdimm->trfc1_ps) - 8U) >> 4U;
161 const unsigned int ext_wrrec = (picos_to_mclk(clk, pdimm->twr_ps) +
179 pdimm->trfc1_ps + 10000U));
189 const int tccdl = max(5U, picos_to_mclk(clk, pdimm->tccdl_ps));
196 const unsigned int acttoact_bg = picos_to_mclk(clk, pdimm->trrdl_ps);
200 const unsigned int refrec_cid_mclk = pdimm->package_3ds ?
201 picos_to_mclk(clk, pdimm->trfc_slr_ps) : 0;
202 const unsigned int acttoact_cid_mclk = pdimm->package_3ds ? 4U : 0;
206 if (avoid_odt_overlap(conf, pdimm) == 2) {
249 if (pdimm->trfc1_ps < trfc1_min) {
250 ERROR("trfc1_ps (%d) < %d\n", pdimm->trfc1_ps, trfc1_min);
358 const struct dimm_params *pdimm)
363 if (pdimm->rdimm == 0) {
379 pdimm->rcw[0] << 28 |
380 pdimm->rcw[1] << 24 |
381 pdimm->rcw[2] << 20 |
382 pdimm->rcw[3] << 16 |
383 pdimm->rcw[4] << 12 |
384 pdimm->rcw[5] << 8 |
385 pdimm->rcw[6] << 4 |
386 pdimm->rcw[7];
388 pdimm->rcw[8] << 28 |
389 pdimm->rcw[9] << 24 |
391 pdimm->rcw[11] << 16 |
392 pdimm->rcw[12] << 12 |
393 pdimm->rcw[13] << 8 |
394 pdimm->rcw[14] << 4 |
407 const struct dimm_params *pdimm,
413 const unsigned int rd_en = (pdimm->rdimm != 0U) ? 1U : 0U;
420 const unsigned int twot_en = pdimm->rdimm ?
437 const unsigned int num_pr = pdimm->package_3ds + 1U;
497 if (pdimm->package_3ds != 0) {
498 if (((pdimm->package_3ds + 1) & 0x1) != 0) {
501 regs->sdram_cfg[2] |= ((pdimm->package_3ds + 1) >> 1)
512 const struct dimm_params *pdimm)
514 const unsigned int refint = picos_to_mclk(clk, pdimm->refresh_rate_ps);
527 const struct dimm_params *pdimm,
555 const unsigned int wr_mclk = picos_to_mclk(clk, pdimm->twr_ps);
584 picos_to_mclk(clk, pdimm->tccdl_ps));
817 const struct dimm_params *pdimm)
821 regs->dq_map[0] = ((pdimm->dq_mapping[0] & 0x3F) << 26) |
822 ((pdimm->dq_mapping[1] & 0x3F) << 20) |
823 ((pdimm->dq_mapping[2] & 0x3F) << 14) |
824 ((pdimm->dq_mapping[3] & 0x3F) << 8) |
825 ((pdimm->dq_mapping[4] & 0x3F) << 2);
827 regs->dq_map[1] = ((pdimm->dq_mapping[5] & 0x3F) << 26) |
828 ((pdimm->dq_mapping[6] & 0x3F) << 20) |
829 ((pdimm->dq_mapping[7] & 0x3F) << 14) |
830 ((pdimm->dq_mapping[10] & 0x3F) << 8) |
831 ((pdimm->dq_mapping[11] & 0x3F) << 2);
833 regs->dq_map[2] = ((pdimm->dq_mapping[12] & 0x3F) << 26) |
834 ((pdimm->dq_mapping[13] & 0x3F) << 20) |
835 ((pdimm->dq_mapping[14] & 0x3F) << 14) |
836 ((pdimm->dq_mapping[15] & 0x3F) << 8) |
837 ((pdimm->dq_mapping[16] & 0x3F) << 2);
840 regs->dq_map[3] = ((pdimm->dq_mapping[17] & 0x3F) << 26) |
841 ((pdimm->dq_mapping[8] & 0x3F) << 20) |
843 (pdimm->dq_mapping[9] & 0x3F) << 14) |
844 pdimm->dq_mapping_ors;
888 const struct dimm_params *pdimm)
905 cal_csn_config(i, regs, popts, pdimm);
1326 const struct dimm_params *pdimm,
1337 if (mclk_ps < pdimm->tckmin_x_ps) {
1345 (pdimm->taa_ps + mclk_ps - 1) / mclk_ps;
1348 caslat_skip = skip_caslat(pdimm->tckmin_x_ps,
1349 pdimm->taa_ps,
1351 pdimm->package_3ds);
1356 while (((pdimm->caslat_x & ~caslat_skip & (1 << cas_latency)) == 0) &&
1374 cal_ddr_csn_bnds(regs, popts, conf, pdimm);
1375 cal_ddr_sdram_cfg(clk, regs, popts, pdimm, ip_rev);
1376 cal_ddr_sdram_rcw(clk, regs, popts, pdimm);
1377 cal_timing_cfg(clk, regs, popts, pdimm, conf, cas_latency,
1379 cal_ddr_dq_mapping(regs, pdimm);
1385 cal_ddr_sdram_mode(clk, regs, popts, conf, pdimm, cas_latency,
1389 cal_ddr_sdram_interval(clk, regs, popts, pdimm);