Lines Matching defs:mclk_ps
20 const unsigned int mclk_ps = get_memory_clk_ps(clk);
22 return mclk_ps >= 1250U ? 9U :
23 (mclk_ps >= 1070U ? 10U :
24 (mclk_ps >= 935U ? 11U :
25 (mclk_ps >= 833U ? 12U :
26 (mclk_ps >= 750U ? 14U :
27 (mclk_ps >= 625U ? 16U : 18U)))));
97 const unsigned int mclk_ps = get_memory_clk_ps(clk);
99 const int txp = max((int)mclk_ps * 4, 6000);
574 const unsigned int mclk_ps = get_memory_clk_ps(clk);
743 if (mclk_ps >= 935) {
745 } else if (mclk_ps >= 833) {
749 WARN("mclk_ps not supported %d", mclk_ps);
1146 unsigned int mclk_ps,
1275 if (mclk_ps < 625 || mclk_ps > tck_max) {
1276 ERROR("mclk %u invalid\n", mclk_ps);
1310 for (k = 0; bin[i].cl[k].tckmin_ps < mclk_ps &&
1313 if (bin[i].cl[k].tckmin_ps > mclk_ps && k > 0) {
1332 const unsigned int mclk_ps = get_memory_clk_ps(clk);
1337 if (mclk_ps < pdimm->tckmin_x_ps) {
1338 ERROR("DDR Clk: MCLK cycle is %u ps.\n", mclk_ps);
1345 (pdimm->taa_ps + mclk_ps - 1) / mclk_ps;
1350 mclk_ps,
1366 if (cas_latency * mclk_ps > 18000) {