Lines Matching defs:spd
63 static int ddr4_spd_check(const struct ddr4_spd *spd)
65 void *p = (void *)spd;
77 if (spd->crc[0] != crc_lsb || spd->crc[1] != crc_msb) {
79 spd->crc[1], spd->crc[0], crc_msb, crc_lsb);
83 p = (void *)spd + 128;
90 if (spd->mod_section.uc[126] != crc_lsb ||
91 spd->mod_section.uc[127] != crc_msb) {
93 spd->mod_section.uc[127], spd->mod_section.uc[126],
102 compute_ranksize(const struct ddr4_spd *spd)
112 if ((spd->density_banks & 0xf) <= 7) {
113 nbit_sdram_cap_bsize = (spd->density_banks & 0xf) + 28;
115 if ((spd->bus_width & 0x7) < 4) {
116 nbit_primary_bus_width = (spd->bus_width & 0x7) + 3;
118 if ((spd->organization & 0x7) < 4) {
119 nbit_sdram_width = (spd->organization & 0x7) + 2;
121 package_3ds = (spd->package_type & 0x3) == 0x2;
123 die_count = (spd->package_type >> 4) & 0x7;
133 int cal_dimm_params(const struct ddr4_spd *spd, struct dimm_params *pdimm)
145 if (spd->mem_type != SPD_MEMTYPE_DDR4) {
150 ret = ddr4_spd_check(spd);
161 if ((spd->info_size_crc & 0xF) > 2) {
162 memcpy(pdimm->mpart, spd->mpart, sizeof(pdimm->mpart) - 1);
166 pdimm->n_ranks = ((spd->organization >> 3) & 0x7) + 1;
168 pdimm->rank_density = compute_ranksize(spd);
176 pdimm->die_density = spd->density_banks & 0xf;
178 pdimm->primary_sdram_width = 1 << (3 + (spd->bus_width & 0x7));
180 if (((spd->bus_width >> 3) & 0x3) != 0) {
186 pdimm->device_width = 1 << ((spd->organization & 0x7) + 2);
188 pdimm->package_3ds = (spd->package_type & 0x3) == 0x2 ?
189 (spd->package_type >> 4) & 0x7 : 0;
192 switch (spd->module_type & DDR4_SPD_MODULETYPE_MASK) {
197 pdimm->rc = spd->mod_section.registered.ref_raw_card & 0x9f;
198 if ((spd->mod_section.registered.reg_map & 0x1) != 0) {
201 val = spd->mod_section.registered.ca_stren;
204 val = spd->mod_section.registered.clk_stren;
226 pdimm->rc = spd->mod_section.unbuffered.ref_raw_card & 0x9f;
227 if ((spd->mod_section.unbuffered.addr_mapping & 0x1) != 0) {
230 if ((spd->mod_section.unbuffered.mod_height & 0xe0) == 0 &&
231 (spd->mod_section.unbuffered.ref_raw_card == 0x04)) {
234 if (spd->mapping[i] == udimm_rc_e_dq[i]) {
238 ptr = (unsigned char *)&spd->mapping[i];
248 ERROR("Unknown module_type 0x%x\n", spd->module_type);
256 pdimm->n_row_addr = ((spd->addressing >> 3) & 0x7) + 12;
258 pdimm->n_col_addr = (spd->addressing & 0x7) + 9;
260 pdimm->bank_addr_bits = (spd->density_banks >> 4) & 0x3;
262 pdimm->bank_group_bits = (spd->density_banks >> 6) & 0x3;
283 if ((spd->timebases & 0xf) == 0x0) {
293 pdimm->tckmin_x_ps = spd_to_ps(spd->tck_min, spd->fine_tck_min);
297 pdimm->tckmax_ps = spd_to_ps(spd->tck_max, spd->fine_tck_max);
308 pdimm->caslat_x = (spd->caslat_b1 << 7) |
309 (spd->caslat_b2 << 15) |
310 (spd->caslat_b3 << 23);
313 if (spd->caslat_b4 != 0) {
320 pdimm->taa_ps = spd_to_ps(spd->taa_min, spd->fine_taa_min);
326 pdimm->trcd_ps = spd_to_ps(spd->trcd_min, spd->fine_trcd_min);
332 pdimm->trp_ps = spd_to_ps(spd->trp_min, spd->fine_trp_min);
336 pdimm->tras_ps = (((spd->tras_trc_ext & 0xf) << 8) +
337 spd->tras_min_lsb) * pdimm->mtb_ps;
341 pdimm->trc_ps = spd_to_ps((((spd->tras_trc_ext & 0xf0) << 4) +
342 spd->trc_min_lsb), spd->fine_trc_min);
345 pdimm->trfc1_ps = ((spd->trfc1_min_msb << 8) | (spd->trfc1_min_lsb)) *
348 pdimm->trfc2_ps = ((spd->trfc2_min_msb << 8) | (spd->trfc2_min_lsb)) *
351 pdimm->trfc4_ps = ((spd->trfc4_min_msb << 8) | (spd->trfc4_min_lsb)) *
355 pdimm->tfaw_ps = (((spd->tfaw_msb & 0xf) << 8) | spd->tfaw_min) *
360 pdimm->trrds_ps = spd_to_ps(spd->trrds_min, spd->fine_trrds_min);
363 pdimm->trrdl_ps = spd_to_ps(spd->trrdl_min, spd->fine_trrdl_min);
366 pdimm->tccdl_ps = spd_to_ps(spd->tccdl_min, spd->fine_tccdl_min);
391 pdimm->dq_mapping[i] = spd->mapping[i];
395 pdimm->dq_mapping_ors = ((spd->mapping[0] >> 6) & 0x3) == 0 ? 1 : 0;