Lines Matching defs:popts
263 struct memctl_opt *popts,
303 popts->cs_odt[i].odt_rd_cfg = pdodt[i].odt_rd_cfg;
305 popts->cs_odt[i].odt_rd_cfg);
306 popts->cs_odt[i].odt_wr_cfg = pdodt[i].odt_wr_cfg;
308 popts->cs_odt[i].odt_wr_cfg);
309 popts->cs_odt[i].odt_rtt_norm = pdodt[i].odt_rtt_norm;
311 popts->cs_odt[i].odt_rtt_norm);
312 popts->cs_odt[i].odt_rtt_wr = pdodt[i].odt_rtt_wr;
314 popts->cs_odt[i].odt_rtt_wr);
315 popts->cs_odt[i].auto_precharge = 0;
317 popts->cs_odt[i].auto_precharge);
324 struct memctl_opt *popts,
330 popts->rdimm = pdimm->rdimm;
331 popts->mirrored_dimm = pdimm->mirrored_dimm;
333 popts->ecc_mode = pdimm->edc_config == 0x02 ? 1 : 0;
335 popts->ctlr_init_ecc = popts->ecc_mode;
336 debug("ctlr_init_ecc %d\n", popts->ctlr_init_ecc);
337 popts->self_refresh_in_sleep = 1;
338 popts->dynamic_power = 0;
345 popts->data_bus_dimm = DDR_DBUS_64;
346 popts->otf_burst_chop_en = 1;
348 popts->data_bus_dimm = DDR_DBUS_32;
349 popts->otf_burst_chop_en = 0;
351 popts->data_bus_dimm = DDR_DBUS_16;
352 popts->otf_burst_chop_en = 0;
357 popts->data_bus_used = popts->data_bus_dimm;
358 popts->x4_en = (pdimm->device_width == 4) ? 1 : 0;
359 debug("x4_en %d\n", popts->x4_en);
362 if (popts->rdimm != 0) {
363 popts->ap_en = 1; /* 0 = disable, 1 = enable */
365 popts->ap_en = 0; /* disabled for DDR4 UDIMM/discrete default */
369 popts->ap_en = 0;
372 debug("ap_en %d\n", popts->ap_en);
375 popts->bstopre = picos_to_mclk(clk, pdimm->refresh_rate_ps) >> 2;
376 popts->tfaw_ps = pdimm->tfaw_ps;
382 struct memctl_opt *popts,
388 popts->ctlr_intlv = 1;
389 popts->ctlr_intlv_mode = DDR_256B_INTLV;
392 debug("ctlr_intlv %d\n", popts->ctlr_intlv);
393 debug("ctlr_intlv_mode %d\n", popts->ctlr_intlv_mode);
395 popts->ba_intlv = auto_bank_intlv(conf->cs_in_use, pdimm);
396 debug("ba_intlv 0x%x\n", popts->ba_intlv);
399 static int update_burst_length(struct memctl_opt *popts)
402 if ((popts->data_bus_used == DDR_DBUS_32) ||
403 (popts->data_bus_used == DDR_DBUS_16)) {
405 popts->otf_burst_chop_en = 0;
406 popts->burst_length = DDR_BL8;
407 } else if (popts->otf_burst_chop_en != 0) { /* on-the-fly burst chop */
408 popts->burst_length = DDR_OTF; /* on-the-fly BC4 and BL8 */
410 popts->burst_length = DDR_BL8;
412 debug("data_bus_used %d\n", popts->data_bus_used);
413 debug("otf_burst_chop_en %d\n", popts->otf_burst_chop_en);
414 debug("burst_length 0x%x\n", popts->burst_length);
422 if (popts->data_bus_dimm > popts->data_bus_used) {
426 popts->dbw_cap_shift = popts->data_bus_used - popts->data_bus_dimm;
427 debug("dbw_cap_shift %d\n", popts->dbw_cap_shift);
438 struct memctl_opt *popts = &priv->opt;
464 popts->clk_adj = prt->clk_adj;
465 popts->wrlvl_start = prt->wrlvl;
466 popts->wrlvl_ctl_2 = (prt->wrlvl * 0x01010101 + dimm[i].add1) &
468 popts->wrlvl_ctl_3 = (prt->wrlvl * 0x01010101 + dimm[i].add2) &