Lines Matching defs:base

161 static void cp110_errata_wa_init(uintptr_t base)
175 	data = mmio_read_32(base + MVEBU_SOC_CFG_REG(MVEBU_SOC_CFG_REG_NUM));
177 	mmio_write_32(base + MVEBU_SOC_CFG_REG(MVEBU_SOC_CFG_REG_NUM), data);
180 static void cp110_pcie_clk_cfg(uintptr_t base)
188 	reg = mmio_read_32(base + MVEBU_SAMPLE_AT_RESET_REG);
193 	if (cp110_rev_id_get(base) == MVEBU_CP110_REF_ID_A2 ||
194 	    cp110_device_id_get(base) == MVEBU_CN9130_DEV_ID) {
199 		reg = mmio_read_32(base + MVEBU_PCIE_REF_CLK_BUF_CTRL);
206 		mmio_write_32(base + MVEBU_PCIE_REF_CLK_BUF_CTRL, reg);
210 	if (cp110_rev_id_get(base) == MVEBU_CP110_REF_ID_A1) {
217 			reg = mmio_read_32(base + MVEBU_CP_MSS_DPSHSR_REG);
219 			mmio_write_32(base + MVEBU_CP_MSS_DPSHSR_REG, reg);
225 static void cp110_stream_id_init(uintptr_t base, uint32_t stream_id)
238 			mmio_write_32(base + stream_id_reg[i],
241 			mmio_write_32(base + stream_id_reg[i], stream_id);
253 static void cp110_axi_attr_init(uintptr_t base)
274 			data = mmio_read_32(base + MVEBU_AXI_ATTR_REG(index));
292 			mmio_write_32(base + MVEBU_AXI_ATTR_REG(index), data);
299 	data = mmio_read_32(base + MVEBU_SATA_M2A_AXI_PORT_CTRL_REG);
310 	mmio_write_32(base + MVEBU_SATA_M2A_AXI_PORT_CTRL_REG, data);
314 		mmio_write_32(base + MVEBU_AXI_PROT_REG(index),
318 void cp110_amb_init(uintptr_t base)
323 	reg = mmio_read_32(base + MVEBU_AMB_IP_BRIDGE_WIN_REG(0));
328 	mmio_write_32(base + MVEBU_AMB_IP_BRIDGE_WIN_REG(0), reg);
331 static void cp110_rtc_init(uintptr_t base)
334 	mmio_clrsetbits_32(base + MVEBU_RTC_BRIDGE_TIMING_CTRL0_REG,
338 	mmio_clrsetbits_32(base + MVEBU_RTC_BRIDGE_TIMING_CTRL0_REG,
343 	mmio_clrsetbits_32(base + MVEBU_RTC_BRIDGE_TIMING_CTRL1_REG,
351 	if ((mmio_read_32(base + MVEBU_RTC_CCR_REG) &
354 		mmio_write_32(base + MVEBU_RTC_TEST_CONFIG_REG, 0);
358 		mmio_write_32(base + MVEBU_RTC_STATUS_REG,
364 		mmio_write_32(base + MVEBU_RTC_IRQ_1_CONFIG_REG, 0);
365 		mmio_write_32(base + MVEBU_RTC_IRQ_2_CONFIG_REG, 0);
366 		mmio_write_32(base + MVEBU_RTC_ALARM_1_REG, 0);
367 		mmio_write_32(base + MVEBU_RTC_ALARM_2_REG, 0);
370 		mmio_write_32(base + MVEBU_RTC_CCR_REG,
374 		mmio_write_32(base + MVEBU_RTC_STATUS_REG,
381 static void cp110_amb_adec_init(uintptr_t base)
384 	mmio_clrbits_32(base + MVEBU_BRIDGE_WIN_DIS_REG,
388 	init_amb_adec(base);
391 static void cp110_trng_init(uintptr_t base)
413 		ret = eip76_rng_probe(base + MVEBU_TRNG_BASE);
415 			ERROR("Failed to init TRNG @ 0x%lx\n", base);
423 	INFO("%s: Initialize CPx - base = %lx\n", __func__, cp110_base);
457 	INFO("%s: Initialize CPx - base = %lx\n", __func__, cp110_base);