Lines Matching defs:comphy_base
95 uint64_t comphy_base)
100 *ap_nr = (((comphy_base & ~0xffffff) - MVEBU_AP_IO_BASE(0)) /
104 *cp_nr = (((comphy_base & ~0xffffff) - MVEBU_AP_IO_BASE(*ap_nr)) /
108 comphy_base, (unsigned long)MVEBU_AP_IO_BASE(*ap_nr),
113 static void mvebu_cp110_comphy_clr_pipe_selector(uint64_t comphy_base,
121 reg = mmio_read_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET);
126 mmio_write_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET,
132 static void mvebu_cp110_comphy_clr_phy_selector(uint64_t comphy_base,
140 reg = mmio_read_32(comphy_base + COMMON_SELECTOR_PHY_REG_OFFSET);
150 mmio_write_32(comphy_base + COMMON_SELECTOR_PHY_REG_OFFSET,
156 static void mvebu_cp110_comphy_set_phy_selector(uint64_t comphy_base,
167 mvebu_cp110_comphy_clr_pipe_selector(comphy_base, comphy_index);
175 reg = mmio_read_32(comphy_base + COMMON_SELECTOR_PHY_REG_OFFSET);
246 mmio_write_32(comphy_base + COMMON_SELECTOR_PHY_REG_OFFSET, reg);
250 static void mvebu_cp110_comphy_set_pipe_selector(uint64_t comphy_base,
262 mvebu_cp110_comphy_clr_phy_selector(comphy_base, comphy_index);
264 reg = mmio_read_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET);
298 mmio_write_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET, reg |
302 int mvebu_cp110_comphy_is_pll_locked(uint64_t comphy_base, uint8_t comphy_index)
310 sd_ip_addr = SD_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
354 static int mvebu_cp110_comphy_sata_power_on(uint64_t comphy_base,
364 mvebu_cp110_get_ap_and_cp_nr(&ap_nr, &cp_nr, comphy_base);
372 mvebu_cp110_comphy_set_phy_selector(comphy_base,
375 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
377 sd_ip_addr = SD_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
379 comphy_addr = COMPHY_ADDR(comphy_base, comphy_index);
679 static int mvebu_cp110_comphy_sgmii_power_on(uint64_t comphy_base,
688 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
690 sd_ip_addr = SD_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
692 comphy_addr = COMPHY_ADDR(comphy_base, comphy_index);
695 mvebu_cp110_comphy_set_phy_selector(comphy_base, comphy_index,
805 ret = mvebu_cp110_comphy_is_pll_locked(comphy_base, comphy_index);
837 static int mvebu_cp110_comphy_xfi_power_on(uint64_t comphy_base,
848 mvebu_cp110_get_ap_and_cp_nr(&ap_nr, &cp_nr, comphy_base);
882 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
884 sd_ip_addr = SD_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
886 comphy_addr = COMPHY_ADDR(comphy_base, comphy_index);
889 mvebu_cp110_comphy_set_phy_selector(comphy_base, comphy_index,
1257 static int mvebu_cp110_comphy_pcie_power_on(uint64_t comphy_base,
1282 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
1284 comphy_addr = COMPHY_ADDR(comphy_base, comphy_index);
1291 reg = mmio_read_32(SYS_CTRL_FROM_COMPHY_ADDR(comphy_base) +
1305 mmio_write_32(SYS_CTRL_FROM_COMPHY_ADDR(comphy_base) +
1310 mvebu_cp110_comphy_set_pipe_selector(comphy_base, comphy_index,
1320 reg = mmio_read_32(DFX_FROM_COMPHY_ADDR(comphy_base) +
1338 reg_set(comphy_base + COMMON_PHY_SD_CTRL1,
1343 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, data, mask);
1355 reg_set(DFX_FROM_COMPHY_ADDR(comphy_base) +
1679 reg_set(comphy_base + COMMON_PHY_SD_CTRL1, data, mask);
1689 COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base), 0) +
1723 reg_set(comphy_base + COMMON_PHY_SD_CTRL1,
1731 COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base), i) +
1750 static int mvebu_cp110_comphy_rxaui_power_on(uint64_t comphy_base,
1759 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
1761 comphy_addr = COMPHY_ADDR(comphy_base, comphy_index);
1762 sd_ip_addr = SD_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
1766 mvebu_cp110_comphy_set_phy_selector(comphy_base, comphy_index,
1777 reg_set(comphy_base + COMMON_PHY_SD_CTRL1,
1782 reg_set(comphy_base + COMMON_PHY_SD_CTRL1,
1937 static int mvebu_cp110_comphy_usb3_power_on(uint64_t comphy_base,
1948 mvebu_cp110_comphy_set_pipe_selector(comphy_base, comphy_index,
1951 mvebu_cp110_get_ap_and_cp_nr(&ap_nr, &cp_nr, comphy_base);
1958 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
1960 comphy_addr = COMPHY_ADDR(comphy_base, comphy_index);
2087 static void rx_pre_train(uint64_t comphy_base, uint8_t comphy_index)
2092 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
2133 int mvebu_cp110_comphy_xfi_rx_training(uint64_t comphy_base,
2142 mvebu_cp110_get_ap_and_cp_nr(&ap_nr, &cp_nr, comphy_base);
2144 hpipe_addr = HPIPE_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
2149 rx_pre_train(comphy_base, comphy_index);
2299 static int mvebu_cp110_comphy_ap_power_on(uint64_t comphy_base,
2305 COMPHY_ADDR(comphy_base, comphy_index);
2308 mvebu_cp110_comphy_set_phy_selector(comphy_base, comphy_index,
2325 mvebu_cp110_get_ap_and_cp_nr(&ap_nr, &cp_nr, comphy_base);
2337 int mvebu_cp110_comphy_digital_reset(uint64_t comphy_base,
2345 sd_ip_addr = SD_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
2368 int mvebu_cp110_comphy_power_on(uint64_t comphy_base,
2380 err = mvebu_cp110_comphy_sata_power_on(comphy_base,
2386 err = mvebu_cp110_comphy_sgmii_power_on(comphy_base,
2393 err = mvebu_cp110_comphy_xfi_power_on(comphy_base,
2399 err = mvebu_cp110_comphy_pcie_power_on(comphy_base,
2404 err = mvebu_cp110_comphy_rxaui_power_on(comphy_base,
2410 err = mvebu_cp110_comphy_usb3_power_on(comphy_base,
2415 err = mvebu_cp110_comphy_ap_power_on(comphy_base, comphy_index,
2429 int mvebu_cp110_comphy_power_off(uint64_t comphy_base, uint8_t comphy_index,
2460 data = mmio_read_32(comphy_base +
2468 mvebu_cp110_get_ap_and_cp_nr(&ap_nr, &cp_nr, comphy_base);
2476 sd_ip_addr = SD_ADDR(COMPHY_PIPE_FROM_COMPHY_ADDR(comphy_base),
2478 comphy_ip_addr = COMPHY_ADDR(comphy_base, comphy_index);
2496 data = mmio_read_32(SYS_CTRL_FROM_COMPHY_ADDR(comphy_base) +
2510 mmio_write_32(SYS_CTRL_FROM_COMPHY_ADDR(comphy_base) +
2522 mvebu_cp110_comphy_clr_phy_selector(comphy_base, comphy_index);
2523 mvebu_cp110_comphy_clr_pipe_selector(comphy_base, comphy_index);