Lines Matching defs:regval
131 uint32_t regval;
140 regval = iproc_i2c_reg_read(bus_id, SMB_CFG_REG);
141 INFO("SMB_CFG_REG=0x%x\n", regval);
143 regval = iproc_i2c_reg_read(bus_id, SMB_TIMGCFG_REG);
144 INFO("SMB_TIMGCFG_REG=0x%x\n", regval);
146 regval = iproc_i2c_reg_read(bus_id, SMB_ADDR_REG);
147 INFO("SMB_ADDR_REG=0x%x\n", regval);
149 regval = iproc_i2c_reg_read(bus_id, SMB_MSTRFIFOCTL_REG);
150 INFO("SMB_MSTRFIFOCTL_REG=0x%x\n", regval);
152 regval = iproc_i2c_reg_read(bus_id, SMB_SLVFIFOCTL_REG);
153 INFO("SMB_SLVFIFOCTL_REG=0x%x\n", regval);
155 regval = iproc_i2c_reg_read(bus_id, SMB_BITBANGCTL_REG);
156 INFO("SMB_BITBANGCTL_REG=0x%x\n", regval);
158 regval = iproc_i2c_reg_read(bus_id, SMB_MSTRCMD_REG);
159 INFO("SMB_MSTRCMD_REG=0x%x\n", regval);
161 regval = iproc_i2c_reg_read(bus_id, SMB_SLVCMD_REG);
162 INFO("SMB_SLVCMD_REG=0x%x\n", regval);
164 regval = iproc_i2c_reg_read(bus_id, SMB_EVTEN_REG);
165 INFO("SMB_EVTEN_REG=0x%x\n", regval);
167 regval = iproc_i2c_reg_read(bus_id, SMB_EVTSTS_REG);
168 INFO("SMB_EVTSTS_REG=0x%x\n", regval);
170 regval = iproc_i2c_reg_read(bus_id, SMB_MSTRDATAWR_REG);
171 INFO("SMB_MSTRDATAWR_REG=0x%x\n", regval);
173 regval = iproc_i2c_reg_read(bus_id, SMB_MSTRDATARD_REG);
174 INFO("SMB_MSTRDATARD_REG=0x%x\n", regval);
176 regval = iproc_i2c_reg_read(bus_id, SMB_SLVDATAWR_REG);
177 INFO("SMB_SLVDATAWR_REG=0x%x\n", regval);
179 regval = iproc_i2c_reg_read(bus_id, SMB_SLVDATARD_REG);
180 INFO("SMB_SLVDATARD_REG=0x%x\n", regval);
194 uint32_t regval;
203 regval = iproc_i2c_reg_read(bus_id, SMB_MSTRCMD_REG);
204 regval &= SMB_MSTRSTARTBUSYCMD_MASK;
211 } while (regval != 0U);
223 uint32_t regval;
297 regval = (num_data_bytes == 1U) ?
300 regval);
312 uint32_t regval;
317 regval = iproc_i2c_reg_read(info->bus_id, SMB_MSTRCMD_REG);
318 while ((regval & SMB_MSTRSTARTBUSYCMD_MASK) != 0U) {
325 regval = iproc_i2c_reg_read(info->bus_id, SMB_MSTRCMD_REG);
329 if (!(regval & SMB_MSTRSTARTBUSYCMD_MASK)) {
331 regval &= SMB_MSTRSTS_MASK;
332 regval >>= SMB_MSTRSTS_SHIFT;
333 if (regval != MSTR_STS_XACT_SUCCESS) {
335 ERROR("%s: ERROR: %u exiting\n", __func__, regval);
381 uint32_t regval;
406 regval = iproc_i2c_reg_read(info->bus_id, SMB_MSTRDATARD_REG);
412 *num_bytes_read = regval & SMB_MSTRRDDATA_MASK;
422 regval = iproc_i2c_reg_read(info->bus_id,
424 info->data[i] = regval & SMB_MSTRRDDATA_MASK;
428 *info->data = regval & SMB_MSTRRDDATA_MASK;
479 uint32_t regval;
486 regval = iproc_i2c_reg_read(bus_id, SMB_CFG_REG);
487 regval |= BIT(SMB_CFG_RST_SHIFT);
488 regval &= ~(BIT(SMB_CFG_SMBEN_SHIFT));
489 iproc_i2c_reg_write(bus_id, SMB_CFG_REG, regval);
495 regval &= ~(BIT(SMB_CFG_RST_SHIFT));
496 iproc_i2c_reg_write(bus_id, SMB_CFG_REG, regval);
502 regval = SMB_MSTRRXFIFOFLSH_MASK | SMB_MSTRTXFIFOFLSH_MASK;
503 iproc_i2c_reg_write(bus_id, SMB_MSTRFIFOCTL_REG, regval);
510 regval = iproc_i2c_reg_read(bus_id, SMB_CFG_REG);
511 regval |= SMB_CFG_SMBEN_MASK;
512 iproc_i2c_reg_write(bus_id, SMB_CFG_REG, regval);
522 regval = 0x0U;
523 iproc_i2c_reg_write(bus_id, SMB_EVTEN_REG, regval);
526 regval = iproc_i2c_reg_read(bus_id, SMB_EVTSTS_REG);
527 iproc_i2c_reg_write(bus_id, SMB_EVTSTS_REG, regval);
576 uint32_t regval;
584 regval = (devaddr << 1U);
585 iproc_i2c_reg_write(bus_id, SMB_MSTRDATAWR_REG, regval);
587 regval = ((SMBUS_PROT_QUICK_CMD << SMB_MSTRSMBUSPROTO_SHIFT) |
589 iproc_i2c_reg_write(bus_id, SMB_MSTRCMD_REG, regval);
598 regval = iproc_i2c_reg_read(bus_id, SMB_MSTRCMD_REG);
599 if (((regval & SMB_MSTRSTS_MASK) >> SMB_MSTRSTS_SHIFT) == 0)
865 uint32_t regval;
868 regval = iproc_i2c_reg_read(bus_id, SMB_TIMGCFG_REG);
869 regval &= SMB_TIMGCFG_MODE400_MASK;
870 regval >>= SMB_TIMGCFG_MODE400_SHIFT;
872 switch (regval) {