Lines Matching defs:div_ctrl_setting
583 * DesiredFreq = BaseClockFreq / (2 * div_ctrl_setting)
585 * ==> div_ctrl_setting = BaseClockFreq / (2 * DesiredFreq)
587 uint32_t div_ctrl_setting;
597 div_ctrl_setting = BASE_CLK_FREQ / (2 * desired_freq);
599 actual_freq = BASE_CLK_FREQ / (2 * div_ctrl_setting);
606 div_ctrl_setting++;
609 return div_ctrl_setting;
612 int32_t chal_sd_set_clock(CHAL_HANDLE *sd_handle, uint32_t div_ctrl_setting,
618 uint32_t clk_sel_high_byte = 0xFF & (div_ctrl_setting >> 8);
619 uint32_t clk_sel_low_byte = 0xFF & div_ctrl_setting;
624 EMMC_TRACE("set_clock(div_ctrl_setting=%d,on=%d)\n",
625 div_ctrl_setting, on);