Lines Matching defs:n
31 #define GIC_FMU_WRITE_64(base, reg, n, val) \
42 mmio_write_32((base) + reg##_LO + (n * 64), (val)); \
43 mmio_write_32((base) + reg##_HI + (n * 64), (val)); \
57 ERROR("GIC600 AE FMU is not responding\n");
76 #define GIC_FMU_WRITE_ON_IDLE_64(base, reg, n, val) \
81 GIC_FMU_WRITE_64(base, reg, n, val); \
92 * to an error record 'n'
94 uint64_t gic_fmu_read_errfr(uintptr_t base, unsigned int n)
100 uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRFR_LO + n * 64U);
102 reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRFR_HI + n * 64U) << 32);
108 * to an error record 'n'
110 uint64_t gic_fmu_read_errctlr(uintptr_t base, unsigned int n)
116 uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRCTLR_LO + n * 64U);
118 reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRCTLR_HI + n * 64U) << 32);
124 * corresponding to an error record 'n'
126 uint64_t gic_fmu_read_errstatus(uintptr_t base, unsigned int n)
132 uint64_t reg_val = (uint64_t)mmio_read_32(base + GICFMU_ERRSTATUS_LO + n * 64U);
134 reg_val |= ((uint64_t)mmio_read_32(base + GICFMU_ERRSTATUS_HI + n * 64U) << 32);
203 void gic_fmu_write_errctlr(uintptr_t base, unsigned int n, uint64_t val)
205 GIC_FMU_WRITE_64(base, GICFMU_ERRCTLR, n, val);
212 void gic_fmu_write_errstatus(uintptr_t base, unsigned int n, uint64_t val)
215 GIC_FMU_WRITE_ON_IDLE_64(base, GICFMU_ERRSTATUS, n, val);